Patents by Inventor Thomas D. Dudderar

Thomas D. Dudderar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5608262
    Abstract: Described is a novel packaging of MCM tiles without wire-bond interconnections and in a total thickness which is reduced relative to conventional MCM packaging. The MCM tile includes a substrate with a plurality of peripheral metallizations and at least one chip flip-chip mounted on the substrate. The PWB is provided with an aperture which is smaller than the size of the silicon substrate but larger than the outside dimensions of the mounted chips. The substrate is positioned on the PWB so that its ends overlap areas of the PWB adjacent the aperture and the chips fit into the aperture. Peripheral metallizations on the substrate are interconnected to metallizations on the PWB by either solder reflow technology or conductive adhesive technology.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: March 4, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Yinon Degani, Thomas D. Dudderar, Byung J. Han, Alan M. Lyons, King L. Tai
  • Patent number: 5564617
    Abstract: A multichip module is assembled using flip-chip bonding technology, a stencil printable solder paste and standard surface mount equipment for interconnecting signaling input/output contact pads on devices within such a multichip module. The disclosed assembly process makes the heretofore difficult and expensive flip chip bonding technique achievable at low cost. The flip chip bonding technique is simplified by use of a solder paste which includes desirable reflow alignment, fluxing and printability characteristics. These desirable characteristics allow the assembly process to be further economically achieved by permitting the use of standard surface mount equipment in the process. High volume production of standard inexpensive modules are thus possible through this process while also achieving the advantage of high density interconnections afforded through the flip-chip bonding technology.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 15, 1996
    Assignee: Lucent Technologies Inc.
    Inventors: Yinon Degani, Thomas D. Dudderar, King L. Tai
  • Patent number: 5505367
    Abstract: The bonding pads (18) of a semiconductor chip (12) each may be provided with a solder bump (36) by first screen printing a pattern of solder paste (36) on a heat-resistant, non-wettable surface (24). The chip (12) is then placed on the surface (24) so each bonding pad (18) contacts a portion of the solder paste pattern (36). The solder paste is then reflowed, yielding molten solder that bonds to the bonding pads (18) of the chip, but not to the surface (24). After reflow, the chip, with its now-bumped pads, is removed from the surface for subsequent soldering to a wettable substrate.
    Type: Grant
    Filed: November 2, 1994
    Date of Patent: April 9, 1996
    Assignee: AT&T Corp.
    Inventors: Yinon Degani, Thomas D. Dudderar, John G. Spadafora
  • Patent number: 5473512
    Abstract: An electronic device, such as an integrated circuit chip or a multichip module, is held in place overlying a circuit board, with which it is thermal expansion mismatched, by three or more localized rigid support elements. The bottom surface of the chip is bonded to the top surface of preferably only one of these support elements and can laterally slide along the top surfaces of the others in response to heating and cooling during electrical operations of the electronic device. In addition, the electronic device is encapsulated in a soft gel that is held in place by a rigid plastic half-shell cover that is epoxy-bonded in place along its perimeter (edge).
    Type: Grant
    Filed: June 16, 1994
    Date of Patent: December 5, 1995
    Assignee: AT&T Corp.
    Inventors: Yinon Degani, Thomas D. Dudderar, Byung J. Han, Venkataram R. Raju
  • Patent number: 5382300
    Abstract: A solder paste is composed of a vehicle (or flux) system and a mixture of at least two solder powders. One component of this mixture is a eutectic or near-eutectic Sn/Pb alloy powder, while the other component comprises powders selected from at least one elemental metal powder or at least one solder alloy powder or at least one elemental metal powder and at least one solder alloy powder. Said other component is a powder or combination of powders each of which has a liquidus temperature which is lower by at least 5 degrees Centigrade (.degree.C.) than the solidus temperature of said eutectic or near-eutectic Sn/Pb alloy powder or a solidus temperature which is higher by at least 5.degree. C. than the liquidus temperature of said eutectic or near-eutectic Sn/Pb alloy powder. The eutectic or near-eutectic Sn/Pb powder makes up from 5 to 95 weight percent of the total powder mixture. Alternatively, not all powders which comprise the second component need to obey this rule so long as at least 30% by wt.
    Type: Grant
    Filed: March 22, 1994
    Date of Patent: January 17, 1995
    Assignee: AT&T Corp.
    Inventors: Greg E. Blonder, Yinon Degani, Thomas D. Dudderar
  • Patent number: 5346118
    Abstract: Described are a process for soldering at least one component having solder bumps to a substrate and a process for forming solder bumps on metal pads of an element, such as an IC package or substrate or both. The bumps are formed by stencil printing solder paste deposits on the metal pads, heating the solder paste deposits to reflow temperature of the solder in the solder paste deposits, and allowing the molten solder in each deposit to coalesce and during subsequent cooling solidify forming the bumps on the metal pads.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: September 13, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Yinon Degani, Thomas D. Dudderar, William L. Woods, Jr.
  • Patent number: 5307983
    Abstract: The present invention is embodied in a technique for precise and accurate height control in fabricating solder bumps or joints formed from a solder bump or bumps. A solder bump is formed by reflow of a conical solder body having base diameter D, height H and cone angle .theta., and has truncated sphere shape, with height h and truncation diameter d. We have found that D, H, and d can be selected such that .differential.h/.differential.H is small (typically .ltoreq.0.5), indicative of relative insensitivity of the bump height to variation in the height of the conical solder body. The inventive process is also applicable to a component (e.g., a laser) solder-bonded to a substrate, and can provide previously unattainable control of the spacing between component and substrate.
    Type: Grant
    Filed: April 27, 1993
    Date of Patent: May 3, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Thomas D. Dudderar, Chee C. Wong
  • Patent number: 4928527
    Abstract: Ultrasonic surface examination, of interest in a variety of manufacturing and maintenance situations, is facilitated by a method which involves localized sensing of a surface wave by optical-fiber interferometry. The method is particularly applicable for examination of surfaces in confined spaces and wherever line-of-sight examination is difficult.
    Type: Grant
    Filed: April 29, 1988
    Date of Patent: May 29, 1990
    Assignee: AT&T Bell Laboratories
    Inventors: Christian P. Burger, Thomas D. Dudderar, John A. Gilbert, Bruce R. Peters, James A. Smith