Abstract: A system for processing a wafer includes a cleaning module configured to only clean the back side of the wafer so as to remove unwanted particles therefrom before performing subsequent processing tasks on the process side of the wafer. The system also includes a processing module configured to perform processing tasks on the process side of the wafer. The processing module includes a chuck for supporting the wafer during the processing task. The system further includes a transport module configured to remove the cleaned wafer from the cleaning module, move it to the processing module and place it on the chuck of the processing module without performing any intervening manipulations during the movement.

Abstract: A method and system for processing a wafer is disclosed. The method includes receiving a wafer having a process side and a backside. The method further includes removing un-wanted particles from the backside of the wafer to prevent gaps from forming between the backside of the wafer and a chucking surface. The method also includes performing a specific processing task on the process side of the wafer after cleaning the backside of the wafer.

Abstract: A method and system for processing a wafer is disclosed. The method includes receiving a wafer having a process side and a backside. The method further includes removing un-wanted particles from the backside of the wafer to prevent gaps from forming between the backside of the wafer and a chucking surface. The method also includes performing a specific processing task on the process side of the wafer after cleaning the backside of the wafer.

Abstract: Improved methods and apparatus for chemically assisted etch processing in a plasma processing system are disclosed. In accordance with one aspect of the invention, improved techniques suitable for performing an etch process in the plasma processing can be realized. The invention operates to reduce the critical dimension bias that is associated with the etch process. Lower critical dimension bias provides many benefits. One such benefit is that features with higher aspect ratio can be etched correctly. In addition, several other undesired effects, e.g., micro loading, bowing and passivation, can be curtailed using the techniques of the present invention.

Abstract: Improved methods and apparatus for chemically assisted etch processing in a plasma processing system are disclosed. In accordance with one aspect of the invention, improved techniques suitable for performing an etch process in the plasma processing can be realized. The invention operates to reduce the critical dimension bias that is associated with the etch process. Lower critical dimension bias provides many benefits. One such benefit is that features with higher aspect ratio can be etched correctly. In addition, several other undesired effects, e.g., micro loading, bowing and passivation, can be curtailed using the techniques of the present invention.

Abstract: A method of etching an oxide layer in a plasma etching reactor is disclosed. The method includes the steps of providing a semiconductor substrate including the oxide layer into the plasma etching reactor and flowing an etching gas that includes a fluorocarbon gas, a nitrogen reactant gas, an oxygen reactant gas, an inert carrier gas, and a hydrogen-containing additive gas into the plasma etching reactor. The method further includes etching an opening at least partially through the oxide layer using a plasma that is formed from the etching gas.

Abstract: A semiconductor manufacturing process wherein deep and narrow 0.6 micron and smaller openings are plasma etched in doped and undoped silicon oxide. The etching gas includes fluorocarbon, oxygen and nitrogen reactants which cooperate to etch the silicon oxide while providing enough polymer build-up to obtain anisotropically etched openings and avoid etch stop of etched openings having aspect ratios of 5:1 and higher. The process is useful for etching 0.25 micron and smaller contact or via openings and can be carried out in a parallel plate plasma reactor having a showerhead electrode.

Abstract: Disclosed is a method for improving the selectivity of dielectric layers to photoresist layers and base layers. The method is performed in a plasma processing chamber, and the photoresist layer is coated over the dielectric layer. The method includes introducing an etchant source gas into the plasma processing chamber, which consists essentially of a CxFy gas and an N.sub.2 gas. The method further includes striking a plasma in the plasma processing chamber from the etchant source gas. The method additionally includes etching at least a portion of the dielectric layer with the plasma through to a base layer that underlies the dielectric layer. The method is also well suited for anisotropically etching an oxide layer with very high selectivities to Si, Si.sub.3 N.sub.4, TiN, and metal silicides.