Patents by Inventor Thomas Davenport
Thomas Davenport has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9624094Abstract: A microelectronic system including hydrogen barriers and copper pillars for wafer level packaging and method of fabricating the same are provided. Generally, the method includes: forming an insulating hydrogen barrier over a surface of a first chip; exposing at least a portion of an electrical contact electrically coupled to a component in the first chip by removing a portion of the insulating hydrogen barrier, the component including a material susceptible to degradation by hydrogen; forming a conducting hydrogen barrier over at least the exposed portion of the electrical contact; and forming a copper pillar over the conducting hydrogen barrier. In one embodiment, the material susceptible to degradation is lead zirconate titanate (PZT) and the microelectronic systems device is a ferroelectric random access memory including a ferroelectric capacitor with a PZT ferroelectric layer. Other embodiments are also disclosed.Type: GrantFiled: April 1, 2016Date of Patent: April 18, 2017Assignee: Cypress Semiconductor CorporationInventors: Shan Sun, Ali Keshavarzi, Thomas Davenport, Thurman John Rodgers
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Publication number: 20170063551Abstract: Methods and systems for securely storing information in an accessible and a tamper-evident manner are disclosed. Exemplary systems and methods encrypt the information and store the encrypted information in a tamper-evident manner. Exemplary systems can additionally allow users to review, verifiably edit, organize, and manage flow of the information.Type: ApplicationFiled: July 24, 2015Publication date: March 2, 2017Inventors: Malachy Quinn, Edward Williams, Thomas Davenport, Vincent Furlong, Wendy Williams
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Patent number: 9548348Abstract: Non-volatile memory cells including complimentary metal-oxide-semiconductor transistors and embedded ferroelectric capacitor and methods of forming the same are described. In one embodiment, the method includes forming on a surface of a substrate a gate level including a gate stack of a MOS transistor, a first dielectric layer overlying the MOS transistor and a first contact extending through the first dielectric layer from a top surface thereof to a diffusion region of the MOS transistor. A local interconnect (LI) layer is deposited over the top surface of the first dielectric layer and the first contact, a ferro stack including a bottom electrode, a top electrode and ferroelectric layer there between deposited over the LI layer, and the ferro stack and the LI layer patterned to form a ferroelectric capacitor and a LI through which the bottom electrode is electrically coupled to the diffusion region of the MOS transistor.Type: GrantFiled: December 17, 2013Date of Patent: January 17, 2017Assignee: Cypress Semiconductor CorporationInventors: Shan Sun, Krishnaswamy Ramkumar, Thomas Davenport, Kedar Patel
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Patent number: 9514797Abstract: An apparatus that includes a reference generating circuit configured to generate a reference signal for a non-volatile memory (NVM) device, the reference generating circuit including a first circuit comprising at least one metal-oxide-semiconductor capacitor, the first circuit generating a first signal component of the reference signal, and a second circuit comprising at least one ferroelectric capacitor, the second circuit generating a second signal component of the reference signal, in which the second signal component is temperature dependent.Type: GrantFiled: June 10, 2016Date of Patent: December 6, 2016Assignee: Cypress Semiconductor CorporationInventors: Fan Chu, Shan Sun, Alan D DeVilbiss, Thomas Davenport
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Patent number: 9318693Abstract: A method for a non-volatile, ferroelectric random access memory (F-RAM) device that includes a ferroelectric capacitor aligned with a preexisting structure is described. In one embodiment, the method includes forming an opening in an insulating layer over a contact in a planar surface of a substrate to expose at least a portion of the contact. Next a self-aligned contact (SAC) is formed electrically coupling to the contact, the SAC medially located in the opening and proximal to a sidewall thereof. A ferroelectric spacer is then formed in the opening medially of the SAC, and a top electrode spacer formed in the opening over the insulating cap and medially of the ferroelectric spacer.Type: GrantFiled: August 26, 2013Date of Patent: April 19, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: John Cronin, Shan Sun, Thomas Davenport
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Patent number: 9149401Abstract: An apparatus and method for preventing decubitus ulcerations including a frame having a pair of frame supports spaced from each other. A mattress is supported on the frame between the frame supports. A pliable support material extends between the supports. The material is adapted to support an individual thereon in a generally recumbent position. A lift mechanism is disposed on the frame and operably connected to the support material. The lift mechanism adjusts the tension of the material so that the support has a first position resting on the mattress and a second position wherein the support is raised above the mattress.Type: GrantFiled: December 23, 2011Date of Patent: October 6, 2015Inventors: Thomas Davenport, Steven Stavrides
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Publication number: 20150004718Abstract: Non-volatile memory cells including complimentary metal-oxide-semiconductor transistors and embedded ferroelectric capacitor and methods of forming the same are described. In one embodiment, the method includes forming on a surface of a substrate a gate level including a gate stack of a MOS transistor, a first dielectric layer overlying the MOS transistor and a first contact extending through the first dielectric layer from a top surface thereof to a diffusion region of the MOS transistor. A local interconnect (LI) layer is deposited over the top surface of the first dielectric layer and the first contact, a ferro stack including a bottom electrode, a top electrode and ferroelectric layer there between deposited over the LI layer, and the ferro stack and the LI layer patterned to form a ferroelectric capacitor and a LI through which the bottom electrode is electrically coupled to the diffusion region of the MOS transistor.Type: ApplicationFiled: December 17, 2013Publication date: January 1, 2015Applicant: Cypress Semiconductor CorporationInventors: Shan SUN, Krishnaswamy RAMKUMAR, Thomas DAVENPORT, Kedar PATEL
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Patent number: 8728901Abstract: A method for fabricating a non-volatile, ferroelectric random access memory (F-RAM) device is described. In one embodiment, the method includes forming an opening in an insulating layer over a surface of a substrate, and forming bottom electrode spacers proximal to sidewalls of the opening. Next, a ferroelectric dielectric layer is formed in the opening over the surface of the substrate and between the bottom electrode spacers, and a pair of top electrodes is formed within the opening comprising first and second side portions displaced laterally from respective ones of the bottom electrode spacers by the ferroelectric dielectric layer.Type: GrantFiled: August 26, 2013Date of Patent: May 20, 2014Assignee: Cypress Semiconductor CorporationInventors: Shan Sun, Thomas Davenport, John Cronin
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Publication number: 20130160208Abstract: An apparatus and method for preventing decubitus ulcerations including a frame having a pair of frame supports spaced from each other. A mattress is supported on the frame between the frame supports. A pliable support material extends between the supports. The material is adapted to support an individual thereon in a generally recumbent position. A lift mechanism is disposed on the frame and operably connected to the support material. The lift mechanism adjusts the tension of the material so that the support has a first position resting on the mattress and a second position wherein the support is raised above the mattress.Type: ApplicationFiled: December 23, 2011Publication date: June 27, 2013Inventors: Thomas Davenport, Steven Stavrides
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Publication number: 20120030878Abstract: An apparatus and method for preventing and/or inhibiting decubitus ulcers including a pad having first and second interconnected sections which form an open region there between. The first pad section includes a first chamber and the second pad section includes a second chamber. The first and second chambers are independently and selectively inflatable and deflatable to change the shape of the pad. The pad has an upper surface adapted to engage a user, the upper surface including a device for removably securing the pad to a user.Type: ApplicationFiled: August 6, 2010Publication date: February 9, 2012Inventors: Thomas Davenport, Steven Stavrides
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Publication number: 20070291468Abstract: Lighted refrigerated display case with remote light source comprises a closed container with an interior of the container refrigerated to a temperature below 7 C. The container is thermally insulated from ambient, having internal and external walls. A solid fiber optic luminaire is at least partially mounted within the container, having an elongated side-light emitting portion for emitting light from the side of the luminaire onto contents in an interior of the display case. The side-light emitting portion comprises an extractor of light arranged to preferentially extract light from the luminaire and direct the light in at least one radial direction along the length of the side-light emitting portion to at least one target area of said contents along a longitudinal axis of the side-light emitting portion. A light-delivery system provides light to the fiber optic luminaire, having a light source mounted remotely from the interior of the container.Type: ApplicationFiled: August 31, 2007Publication date: December 20, 2007Inventors: Roger Buelow, John Davenport, William Cassarly, Thomas Davenport, Gregory Frankiewicz, Chris Jenson, Robert Caywood
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Publication number: 20070280593Abstract: Various embodiments are described that provide a techniques to produce sharp, high contrast, edge enhanced images using edge-lit displays. The edge-lit displays may comprise extractor pattern painted, etched or molded on a light guide. The extractor pattern may be determined from an edge-enhanced input pattern and modified iteratively to produce an edge-enhanced output pattern.Type: ApplicationFiled: May 21, 2007Publication date: December 6, 2007Applicant: Optical Research AssociatesInventors: Joseph Brychell, Douglas Nutter, Thomas Davenport, William Cassarly
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Publication number: 20070247835Abstract: Lighted display case with remote light source comprises a container having contents for display. A solid fiber optic luminaire is at least partially mounted within the container, having an elongated side-light emitting portion for emitting light from the side of the luminaire onto contents in an interior of the display case. The side-light emitting portion comprises an extractor of light arranged to preferentially extract light from the luminaire and direct the light to at least one target area of said contents. The portion may be rotatable about its own longitudinal axis. A single side-light emitting portion may be arranged to illuminate a target area on one of its lateral sides, and another target area on another lateral side. A single lamp may provide light to first and second luminaires arranged to illuminate a target area on one of its lateral sides, and another target area on another lateral side.Type: ApplicationFiled: April 24, 2006Publication date: October 25, 2007Inventors: Roger Buelow, John Davenport, William Cassarly, Thomas Davenport, Gregory Frankiewicz, Chris Jenson, Robert Caywood
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Publication number: 20070247831Abstract: Lighted refrigerated display case with remote light source comprises a closed container with an interior of the container refrigerated to a temperature below 7 C. The container is thermally insulated from ambient, having internal and external walls. A solid fiber optic luminaire is at least partially mounted within the container, having an elongated side-light emitting portion for emitting light from the side of the luminaire onto contents in an interior of the display case. The side-light emitting portion comprises an extractor of light arranged to preferentially extract light from the luminaire and direct the light in at least one radial direction along the length of the side-light emitting portion to at least one target area of said contents along a longitudinal axis of the side-light emitting portion. A light-delivery system provides light to the fiber optic luminaire, having a light source mounted remotely from the interior of the container.Type: ApplicationFiled: April 24, 2006Publication date: October 25, 2007Inventors: Roger Buelow, John Davenport, William Cassarly, Thomas Davenport, Gregory Frankiewicz, Chris Jenson, Robert Caywood
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Publication number: 20070211488Abstract: A luminaire with improved lateral illuminance control comprising a light pipe with a longitudinal center is disclosed. A light-extraction means applied to a radial swath of the light pipe has a longitudinal portion having dimension along its length, centered about a slice on the light pipe longitudinally; said slice being orthogonal to the longitudinal center and located in a propagation plane through which light propagates to a virtual target area intersecting the propagation plane. The light pipe intervenes between the radial swath and the target area. A first average efficiency point of the light-extraction means corresponds to the minimum distance to the target area being at least approximately 20% less than a respective, second average efficiency point corresponding to a respective maximum distance to such area. The light-extraction means efficiency varies from the first average efficiency point to the second average efficiency point though more than one non-zero value.Type: ApplicationFiled: March 2, 2006Publication date: September 13, 2007Inventors: William Cassarly, Thomas Davenport, John Davenport, Chris Jenson
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Publication number: 20070024971Abstract: Various embodiments described herein comprise mixers comprising a light pipe having input and output ends and a central region therebetween. An optical path extends in a longitudinal direction from the input end through the central region to the output end. The central region of the light pipe comprises one or more rippled reflective sidewalls having a plurality of elongate ridges and valleys and sloping surfaces therebetween. Light from the input end propagating along the optical path reflects from the sloping surfaces and is redirected at a different azimuthal direction toward the output end thereby mixing the light at the output end. Illuminance and/or color mixing can therefore be provided.Type: ApplicationFiled: May 26, 2006Publication date: February 1, 2007Inventors: William Cassarly, Thomas Davenport, James McGuire
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Publication number: 20060232993Abstract: Luminaire with directional side-light extraction comprises a light pipe with a light-carrying core, and with a light-extraction structure along a first longitudinal side of the luminaire, confined to a radial swath of the luminaire, along the longitudinal axis of the luminaire, of substantially less than 180°. The second end has light-saving structure for directing saved light from the second end towards the first end, at redirection angles other than an excluded range of redirection angles, so long as the photon content of light at so-called alpha redirection angles is at least 10 percent of the photon content of light at so-called beta redirection angles, where the excluded range of redirection angles is defined by a mathematical formula. The light-extraction means is adjustable to accommodate angular distributions of light from various light sources.Type: ApplicationFiled: April 5, 2006Publication date: October 19, 2006Inventors: William Cassarly, Thomas Davenport, John Davenport, Chris Jenson
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Publication number: 20050231973Abstract: A luminaire with directional side-light extraction comprises a light pipe with a light-carrying core. The light pipe has light-extraction structure along a first longitudinal side of the luminaire, which is confined to a radial swath of the luminaire, along the longitudinal axis of the luminaire, of substantially less than 180°. For efficiency, the second end has light-saving structure for directing saved light from the second end towards the first end, at redirection angles other than an excluded range of redirection angles, so long as the photon content of light at so-called alpha redirection angles is at least 10 percent of the photon content of light at so-called beta redirection angles, where the excluded range of redirection angles is defined by: |?r?<=20° and |?r|<|?r|/10, where ?r is the beta redirection angle and ?r is the alpha redirection angle.Type: ApplicationFiled: April 18, 2005Publication date: October 20, 2005Inventors: William Cassarly, Thomas Davenport, John Davenport, Chris Jenson
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Patent number: 6853535Abstract: A bottom electrode structure and manufacturing method is described for producing crystallographically textured iridium electrodes for making textured PZT capacitors that enables enhanced ferroelectric memory performance. The use of seed layers originating from hexagonal crystal structures with {0001} texture provides a smooth surface for growth of {111} textured iridium, which exhibits the face-centered cubic (“FCC”) structure. This seeding technique results in {111} textured iridium with a small surface roughness relative to the film thickness. The highly textured iridium supports {111} textured PZT dielectric layer growth. Textured PZT exhibits enhanced switched polarization, reduced operating voltage and also improves the reliability of PZT capacitors used in FRAM® memory and other microelectronic devices.Type: GrantFiled: July 3, 2002Date of Patent: February 8, 2005Assignee: Ramtron International CorporationInventors: Glen Fox, Thomas Davenport
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Publication number: 20040004236Abstract: A bottom electrode structure and manufacturing method is described for producing crystallographically textured iridium electrodes for making textured PZT capacitors that enables enhanced ferroelectric memory performance. The use of seed layers originating from hexagonal crystal structures with {0001} texture provides a smooth surface for growth of {111} textured iridium, which exhibits the face-centered cubic (“FCC”) structure. This seeding technique results in {111} textured iridium with a small surface roughness relative to the film thickness. The highly textured iridium supports {111} textured PZT dielectric layer growth. Textured PZT exhibits enhanced switched polarization, reduced operating voltage and also improves the reliability of PZT capacitors used in FRAM® memory and other microelectronic devices.Type: ApplicationFiled: July 3, 2002Publication date: January 8, 2004Inventors: Glen Fox, Thomas Davenport