Abstract: A system for providing high resolution image output for pilotage and two color operation for threat detection is disclosed. The system comprises a focal plane array comprising a plurality of pixels arranged into groups of equal numbers, wherein each pixel comprises at least two detectors for receiving electromagnetic energy and a readout integrated circuit.

Abstract: Techniques, systems, architectures, and methods for reducing peak power during an Analog-to-Digital Conversion (ADC) process, in embodiments on a Focal Plane Array (FPA).

Abstract: A system for providing high resolution image output for pilotage and two color operation for threat detection, the system comprising a focal plane array, the focal plane array comprising: a plurality of pixels, wherein the pixels are arranged into groups of equal numbers of pixels, each pixel comprising: at least two detectors configured to receive electromagnetic energy; and a readout integrated circuit comprising an analog portion and a digital portion, which combine to form a current to frequency conversion circuit configured to convert current received from one of the at least two detectors into a pulse train, and a counter in operative communication with the frequency conversion circuit configured to count pulses in the pulse train during an integration time, wherein each detector from each of the pixels in a group of pixels is configured such that it can be connected to or disconnected from at least one detector from each adjacent pixel in a row or column from the same said group of pixels, and wherein

Abstract: Techniques and architecture are disclosed for allowing the provenance of an integrated circuit to be verified using a dielet in wireless communication with a die through a near-field communications protocol where the positions of the dielet and die are fixed relative to one another during manufacturing such that their respective means for wirelessly communicating with one another are aligned.

Abstract: Techniques, systems, architectures, and methods for reducing peak power during an Analog-to-Digital Conversion (ADC) process, in embodiments on a Focal Plane Array (FPA).

Abstract: Techniques are provided for a physically unclonable function (PUF) device. One example PUF device includes, a readout integrated circuit (ROIC) (such as a ROIC for a focal plane array or other imaging application), a nanomaterial-based PUF layer on the ROIC, and a common electrode on the PUF layer. The nanomaterial is randomly distributed throughout the PUF layer. A method of using a PUF device that includes a nanomaterial-based PUF layer coupled to a ROIC, where the nanomaterial is randomly distributed throughout the PUF layer, includes driving the ROIC at a plurality of locations coupled to a corresponding plurality of locations of the PUF layer, sensing the nanomaterial at the locations of the PUF layer, and generating a unique identification key from the sensed locations of the PUF layer. The method can be used, for example, for secure decryption or for identifying or authenticating the PUF device.

Abstract: A method for protecting analog or mixed signal ICIP uses adjustment requirements of analog circuits to provide an obfuscated mechanism for preventing unauthorized use of an analog or mixed-signal IC (“AIC”) by disabling the AIC until application of an adjustment signal that is within a narrow enabling subrange. Embodiments significantly increase the adjustment range beyond the enabling subrange, and/or omit AIC tuning outputs that are not required for operation of the IC. Embodiments include “clipping” circuits that render the AIC outputs unresponsive to tuning signals outside of the enabling subrange. Information regarding the enabling subrange and/or a separate enabling IC can be provided to authorized users, and/or enabling bits of a digital adjustment input can be permanently set by the ICIP owner after AIC manufacture. The ICIP can be further protected by a security feature that can be unique to each AIC, and/or by using a two-foundry production method.

Abstract: Techniques for performing built-in self-test (BIST) of performance of an RF system are disclosed. The techniques may be used, for example, for measuring distortion generated by the RF system under test, detecting faults in the system, determining calibration of the system, and/or assisting in compensating analog circuitry that is sensitive to temperature, supply voltage, and/or process variations. Also, a BIST architecture for determining RF performance of an RF systems is disclosed.

Abstract: Techniques are disclosed for optimization of RF converters. The techniques can be employed, for instance, in RF converters implemented in semiconductor materials (system-on-chip, or chip set) or with discrete components on a printed circuit board. In any such cases, the RF converter system can be configured with one or more actuators to adjust performance, one or more sensor to assess the performance (e.g., linearity of RF converter) and parameters of interest (e.g., ambient temperature, and a control block for controlling the sensors and actuators. The configuration allows the RF converter to autonomously self-optimize for linearity or other parameters of interest such as gain, noise figure, and dynamic range, across a broad range of variables.

Abstract: A feedforward linearizer device is disclosed. The device includes a main amplifier, and a linearizing amplifier operatively coupled to the main amplifier. A first reference generator is operatively coupled to the main amplifier by a first reference node. A second reference generator is operatively coupled to the linearizing amplifier by a second reference node, and is configured to cause an optimal linearizing amplifier output current for each of a plurality of temperatures. In one such case, the second reference generator is configured to cause an optimal linearizing amplifier output current for each of a plurality of temperatures based on a corresponding optimal ratio of main amplifier output current and linearizing amplifier output current. The linearizing amplifier may be configured with a tunable current source that is controlled by the second reference generator, or a current source having a fixed total transistor area (not tunable).

Abstract: A feedforward linearizer device is disclosed. The device includes a main amplifier, and a linearizing amplifier operatively coupled to the main amplifier. A first reference generator is operatively coupled to the main amplifier by a first reference node. A second reference generator is operatively coupled to the linearizing amplifier by a second reference node, and is configured to cause an optimal linearizing amplifier output current for each of a plurality of temperatures. In one such case, the second reference generator is configured to cause an optimal linearizing amplifier output current for each of a plurality of temperatures based on a corresponding optimal ratio of main amplifier output current and linearizing amplifier output current. The linearizing amplifier may be configured with a tunable current source that is controlled by the second reference generator, or a current source having a fixed total transistor area (not tunable).

Abstract: Techniques for performing built-in self-test (BIST) of performance of an RF system are disclosed. The techniques may be used, for example, for measuring distortion generated by the RF system under test, detecting faults in the system, determining calibration of the system, and/or assisting in compensating analog circuitry that is sensitive to temperature, supply voltage, and/or process variations. Also, a BIST architecture for determining RF performance of an RF systems is disclosed.

Abstract: Techniques are disclosed for eliminating or otherwise sufficiently suppressing spurious signals. The techniques are particularly useful in applications such as those that employ aggressor frequency sources along with a frequency conversion or mixing function, and especially applications implemented as a system-on-chip. In the spur-training mode, a spur-canceller circuit identifies spurious tones associated with the host system to neutralize those tones when running in a normal mode. The tones are neutralized using a comb generator with variable phase and gain by way of cancellation with comb output signals having substantially the same amplitude and a phase that is 180° out of phase with the aggressor tone to be cancelled.

Abstract: Techniques are disclosed for optimization of RF converters. The techniques can be employed, for instance, in RF converters implemented in semiconductor materials (system-on-chip, or chip set) or with discrete components on a printed circuit board. In any such cases, the RF converter system can be configured with one or more actuators to adjust performance, one or more sensor to assess the performance (e.g., linearity of RF converter) and parameters of interest (e.g., ambient temperature, and a control block for controlling the sensors and actuators. The configuration allows the RF converter to autonomously self-optimize for linearity or other parameters of interest such as gain, noise figure, and dynamic range, across a broad range of variables.

Abstract: Techniques are disclosed for eliminating or otherwise sufficiently suppressing spurious signals. The techniques are particularly useful in applications such as those that employ aggressor frequency sources along with a frequency conversion or mixing function, and especially applications implemented as a system-on-chip. In the spur-training mode, a spur-canceller circuit identifies spurious tones associated with the host system to neutralize those tones when running in a normal mode. The tones are neutralized using a comb generator with variable phase and gain by way of cancellation with comb output signals having substantially the same amplitude and a phase that is 180° out of phase with the aggressor tone to be cancelled.