Patents by Inventor Thomas E. Fugini

Thomas E. Fugini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9823968
    Abstract: Variable Redundancy Distributed (VRD) RAID controller in a data storage environment contains embedded RAID logic permitting to choose and compute a desired redundancy coding scheme from a plurality thereof pre-programmed and embedded in a Compute Engine in the VRD RAID controller. “Write” or “Read” requests which are received from data generating entities, contain information identifying a type of the redundancy coding scheme of interest. The controller decodes the request, and automatically applies the desired computation to the incoming data without burdening the CPU with the computational activity. The variable redundancy computational ability of the subject systems provides an extremely versatile and flexible tool for RAID operations.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: November 21, 2017
    Assignee: DataDirect Networks, Inc.
    Inventors: Thomas E. Fugini, Michael J. Piszczek, William J Harker, Jason M. Cope, Pavan Kumar Uppu
  • Patent number: 9639457
    Abstract: In the data storage system the storage area network performs XOR operations on incoming data for parity generation without buffering data through a centralized RAID engine or processor. The hardware for calculating the XOR data is distributed to incrementally calculate data parity in parallel across each data channel and may be implemented as a set of FPGAs with low bandwidths to efficiently scale as the amount of storage memory increases. A host adaptively appoints data storage controllers in the storage area network to perform XOR parity operations on data passing therethrough. The system provides data migration and parity generation in a simple and effective matter and attains a reduction in cost and power consumption.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: May 2, 2017
    Assignee: DataDirect Networks, Inc.
    Inventors: Michael J. Piszczek, Jason M. Cope, William J. Harker, Thomas E. Fugini, Pavan Kumar Uppu
  • Patent number: 9092152
    Abstract: Distributed Compute Engine (DCE) memory controller in a data storage environment contains embedded logic and arithmetic functionality for Boolean logical and arithmetic operations. “Write” or “Read” requests which are received from data generating entities, contain a Physical Address field identifying an address of a data block to be retrieved from the external memory, and a Control bits field identifying a type of computational operation to be performed. The DCE memory controller decodes the request, and applies the desired compute operation autonomically to the contents of an external memory and/or the incoming data without burdening the CPU with the computational activity.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 28, 2015
    Assignee: DataDirect Networks, Inc.
    Inventors: Michael J. Piszczek, Thomas E. Fugini, William J. Harker, Pavan K. Uppu, Jason M. Cope
  • Patent number: 8959420
    Abstract: The present data storage system employs a memory controller with embedded logic to selectively XOR incoming data with data written in the memory to generate XOR parity data. The memory controller automatically performs XOR operations on incoming data based upon the address range associated with the memory “write” request. The system provides data migration and parity generation in a simple and effective manner and attains reduction in cost and power consumption. The memory controller may be built on the basis of FPGAs, thus providing an economical and miniature system.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 17, 2015
    Assignee: DataDirect Networks, Inc.
    Inventors: Michael J. Piszczek, Jason M. Cope, William J Harker, Pavan Kumar Uppu, Thomas E. Fugini