Patents by Inventor Thomas F. Ambrose

Thomas F. Ambrose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11631797
    Abstract: A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: April 18, 2023
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Thomas F. Ambrose, Melissa G. Loving
  • Patent number: 11342491
    Abstract: One example includes a magnetic Josephson junction (MJJ) system. The system includes a first superconducting material layer and a second superconducting material layer each configured respectively as a galvanic contacts. The system also includes a ferrimagnetic material layer arranged between the first and second superconducting material layers and that is configured to exhibit a fixed net magnetic moment at a predetermined operating temperature of the MJJ system. The system also includes a ferromagnetic material layer arranged between the first and second superconducting material layers and that is configured to exhibit a variable magnetic orientation in response to an applied magnetic field. The MJJ system can be configured to store a binary logical value based on a direction of the variable magnetic orientation of the ferromagnetic material layer. The system further includes a spacer layer arranged between the ferromagnetic and the ferrimagnetic material layers.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: May 24, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Thomas F. Ambrose, Melissa G. Loving, Alastair Charlie Fisher
  • Patent number: 11316099
    Abstract: A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom electrode to receive electrical current from an external source and to provide the electrical current to the memory stack. A free layer stores a logic state of the skyrmions in response to the electrical current. A Dzyaloshinskii-Moriya (DM) Interaction (DMI) layer in contact with the free layer induces skyrmions in the free layer. A tunnel barrier is interactive with the DMI layer to facilitate detection of the logic state of the skyrmions in response to a read current. At least one fixed magnetic (FM) layer is positioned within the memory stack to facilitate programming of the skyrmions within the free layer in response to the electrical current.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: April 26, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Michael M. Fitelson, Thomas F. Ambrose, Nicholas D. Rizzo
  • Publication number: 20220102611
    Abstract: One example includes a magnetic Josephson junction (MJJ) system. The system includes a first superconducting material layer and a second superconducting material layer each configured respectively as a galvanic contacts. The system also includes a ferrimagnetic material layer arranged between the first and second superconducting material layers and that is configured to exhibit a fixed net magnetic moment at a predetermined operating temperature of the MJJ system. The system also includes a ferromagnetic material layer arranged between the first and second superconducting material layers and that is configured to exhibit a variable magnetic orientation in response to an applied magnetic field. The MJJ system can be configured to store a binary logical value based on a direction of the variable magnetic orientation of the ferromagnetic material layer. The system further includes a spacer layer arranged between the ferromagnetic and the ferrimagnetic material layers.
    Type: Application
    Filed: September 28, 2020
    Publication date: March 31, 2022
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: THOMAS F. AMBROSE, MELISSA G. LOVING, ALASTAIR CHARLIE FISHER
  • Patent number: 11211117
    Abstract: A magnetic Josephson junction (MJJ) device having a ferrimagnetic/ferromagnetic (FIM/FM) exchange-biased bilayer used as the magnetic hard layer improves switching performance by effectively sharpening the hysteresis curve of the device, thereby reducing error rate when the device is used in a Josephson magnetic random access memory (JMRAM) memory cell. Thus, the materials and devices described herein can be used to build a new type of MJJ, termed a ferrimagnetic Josephson junction (FIMJJ), for use in JMRAM, to construct a robust and reliable cryogenic computer memory that can be used for high-speed superconducting computing, e.g., with clock speeds in the microwave frequency range.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: December 28, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Melissa G. Loving, Thomas F. Ambrose
  • Patent number: 11047817
    Abstract: A sealed container having gloves attached thereto is provided as part of a physical properties measuring system (PPMS). The PPMS includes a sealed pressurized portion that is pressurized with a gas to purge out air from inside the sealed pressurized portion to reduce water vapor inside the sealed pressurized portion below a water vapor threshold. The system further includes a cryogenic tank having a cryostat disposed therein. The cryogenic tank contains a cryogenic liquid cooled to a cryogenic temperature. Test samples are placed inside the sealed pressurized portion in preparation of measuring physical properties of the test samples. One of the test samples is immersed in the cryogenic liquid to measure the physical properties. The test sample is removed from the cryogenic liquid and is exchanged for another test sample inside the sealed pressurized portion to prevent ice formation inside the cryostat.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: June 29, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Kurt Edward Dietrich, Thomas F. Ambrose, Eric C. Gingrich, Timothy Richard Barbour
  • Patent number: 11024791
    Abstract: A memory cell is provided that comprises a first superconductor electrode, a second superconductor electrode, and a magnetic Josephson junction (MJJ) stack disposed between the first superconductor electrode and the second superconductor electrode. The MJJ stack includes a magnetic reference layer and a magnetic storage layer. The memory cell further comprises a magnetically stabilizing structure disposed between the MJJ stack and the second superconductor electrode, wherein the magnetic stabilizing structure magnetically couples with the magnetic reference layer to strengthen the fixed state of the magnetic reference layer.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: June 1, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: James Matthew Murduck, Melissa G. Loving, Thomas F. Ambrose
  • Publication number: 20210066572
    Abstract: A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
    Type: Application
    Filed: November 11, 2020
    Publication date: March 4, 2021
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: THOMAS F. AMBROSE, MELISSA G. LOVING
  • Patent number: 10910544
    Abstract: Superconducting circuits and memories that use a magnetic Josephson junction (MJJ) device as a pi inverter are disclosed. The MJJ device includes superconducting layers configured to allow a flow of a supercurrent through the MJJ device. The MJJ device further includes a magnetic layer arranged between the superconducting layers, where the magnetic layer has an associated magnetization direction, and where the first state of the MJJ device corresponds to a zero-phase of a supercurrent flowing through the MJJ device and the second state of the MJJ device corresponds to a ?-phase of the supercurrent flowing through the MJJ device. In response to an application of a magnetic field, without any change in the magnetization direction of the magnetic layer, the MJJ device is configured to switch from the first state to the second state responsive to a change in a phase of the supercurrent.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: February 2, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas F. Ambrose, James M. Murduck
  • Patent number: 10879447
    Abstract: A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: December 29, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Thomas F. Ambrose, Melissa G. Loving
  • Publication number: 20200332958
    Abstract: A sealed container having gloves attached thereto is provided as part of a physical properties measuring system (PPMS). The PPMS includes a sealed pressurized portion that is pressurized with a gas to purge out air from inside the sealed pressurized portion to reduce water vapor inside the sealed pressurized portion below a water vapor threshold. The system further includes a cryogenic tank having a cryostat disposed therein. The cryogenic tank contains a cryogenic liquid cooled to a cryogenic temperature. Test samples are placed inside the sealed pressurized portion in preparation of measuring physical properties of the test samples. One of the test samples is immersed in the cryogenic liquid to measure the physical properties. The test sample is removed from the cryogenic liquid and is exchanged for another test sample inside the sealed pressurized portion to prevent ice formation inside the cryostat.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: KURT EDWARD DIETRICH, THOMAS F. AMBROSE, ERIC C. GINGRICH, TIMOTHY RICHARD BARBOUR
  • Publication number: 20200303633
    Abstract: A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom electrode to receive electrical current from an external source and to provide the electrical current to the memory stack. A free layer stores a logic state of the skyrmions in response to the electrical current. A Dzyaloshinskii-Moriya (DM) Interaction (DMI) layer in contact with the free layer induces skyrmions in the free layer. A tunnel barrier is interactive with the DMI layer to facilitate detection of the logic state of the skyrmions in response to a read current. At least one fixed magnetic (FM) layer is positioned within the memory stack to facilitate programming of the skyrmions within the free layer in response to the electrical current.
    Type: Application
    Filed: June 5, 2020
    Publication date: September 24, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: MICHAEL M. FITELSON, THOMAS F. AMBROSE, NICHOLAS D. RIZZO
  • Publication number: 20200295249
    Abstract: A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 17, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: THOMAS F. AMBROSE, MELISSA G. LOVING
  • Publication number: 20200274049
    Abstract: Superconducting circuits and memories that use a magnetic Josephson junction (MJJ) device as a pi inverter are disclosed. The MJJ device includes superconducting layers configured to allow a flow of a supercurrent through the MJJ device. The MJJ device further includes a magnetic layer arranged between the superconducting layers, where the magnetic layer has an associated magnetization direction, and where the first state of the MJJ device corresponds to a zero-phase of a supercurrent flowing through the MJJ device and the second state of the MJJ device corresponds to a ?-phase of the supercurrent flowing through the MJJ device. In response to an application of a magnetic field, without any change in the magnetization direction of the magnetic layer, the MJJ device is configured to switch from the first state to the second state responsive to a change in a phase of the supercurrent.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 27, 2020
    Inventors: Thomas F. Ambrose, James M. Murduck
  • Publication number: 20200259074
    Abstract: A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom electrode to receive electrical current from an external source and to provide the electrical current to the memory stack. A free layer stores a logic state of the skyrmions in response to the electrical current. A Dzyaloshinskii-Moriya (DM) Interaction (DMI) layer in contact with the free layer induces skyrmions in the free layer. A tunnel barrier is interactive with the DMI layer to facilitate detection of the logic state of the skyrmions in response to a read current. At least one fixed magnetic (FM) layer is positioned within the memory stack to facilitate programming of the skyrmions within the free layer in response to the electrical current.
    Type: Application
    Filed: February 12, 2019
    Publication date: August 13, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: MICHAEL M. FITELSON, THOMAS F. AMBROSE, NICHOLAS D. RIZZO
  • Publication number: 20200243132
    Abstract: A magnetic Josephson junction (MJJ) device having a ferrimagnetic/ferromagnetic (FIM/FM) exchange-biased bilayer used as the magnetic hard layer improves switching performance by effectively sharpening the hysteresis curve of the device, thereby reducing error rate when the device is used in a Josephson magnetic random access memory (JMRAM) memory cell. Thus, the materials and devices described herein can be used to build a new type of MJJ, termed a ferrimagnetic Josephson junction (FIMJJ), for use in JMRAM, to construct a robust and reliable cryogenic computer memory that can be used for high-speed superconducting computing, e.g., with clock speeds in the microwave frequency range.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: MELISSA G. LOVING, THOMAS F. AMBROSE
  • Patent number: 10720572
    Abstract: A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom electrode to receive electrical current from an external source and to provide the electrical current to the memory stack. A free layer stores a logic state of the skyrmions in response to the electrical current. A Dzyaloshinskii-Moriya (DM) Interaction (DMI) layer in contact with the free layer induces skyrmions in the free layer. A tunnel barrier is interactive with the DMI layer to facilitate detection of the logic state of the skyrmions in response to a read current. At least one fixed magnetic (FM) layer is positioned within the memory stack to facilitate programming of the skyrmions within the free layer in response to the electrical current.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: July 21, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Michael M. Fitelson, Thomas F. Ambrose, Nicholas D. Rizzo
  • Patent number: 10546621
    Abstract: Magnetic Josephson junction driven flux-biased superconductor memory cell and methods are provided. A memory cell may include a magnetic Josephson junction (MJJ) superconducting quantum interference device (SQUID) comprising a first MJJ device and a second MJJ device, arranged in parallel to each other, where the MJJ SQUID is configured to generate a first flux-bias or a second flux-bias, where the first flux-bias corresponds to a first direction of current flow in the MJJ SQUID and the second flux-bias corresponds to a second direction of current flow in the MJJ SQUID. The memory cell may further include a superconducting metal-based superconducting quantum interference device (SQUID) including a first Josephson junction (JJ) and a second JJ, arranged in parallel to each other, where each of the first JJ and the second JJ has a critical current responsive to any flux-bias generated by the MJJ SQUID.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: January 28, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: James M. Murduck, Thomas F. Ambrose
  • Publication number: 20190392878
    Abstract: Magnetic Josephson junction driven flux-biased superconductor memory cell and methods are provided. A memory cell may include a magnetic Josephson junction (MJJ) superconducting quantum interference device (SQUID) comprising a first MJJ device and a second MJJ device, arranged in parallel to each other, where the MJJ SQUID is configured to generate a first flux-bias or a second flux-bias, where the first flux-bias corresponds to a first direction of current flow in the MJJ SQUID and the second flux-bias corresponds to a second direction of current flow in the MJJ SQUID. The memory cell may further include a superconducting metal-based superconducting quantum interference device (SQUID) including a first Josephson junction (JJ) and a second JJ, arranged in parallel to each other, where each of the first JJ and the second JJ has a critical current responsive to any flux-bias generated by the MJJ SQUID.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: James M. Murduck, Thomas F. Ambrose
  • Patent number: 10242725
    Abstract: Apparatus and method contemplating a magnetoresistive memory apparatus having a read element having a high resistance material selected to optimize read sensitivity and a write element having a material selected for a lower critical current response than the read element critical current response to optimize switching efficiency, wherein the read element resistance is higher than the write element resistance, and a shared storage space for both elements.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: March 26, 2019
    Assignee: Seagate Technology, LLC
    Inventors: Oleg N. Mryasov, Thomas F. Ambrose, Werner Scholz