Abstract: Systems and techniques for adaptive automatic acknowledgment handling are described. A described system includes a memory structure to store a data rate (DR) adaptation mode indicator, a frame check sequence (FCS) adaptation mode indicator, a preset DR parameter, and a preset FCS parameter; an extractor to extract a DR parameter from a received frame to produce an extracted DR parameter and extract a FCS parameter from the received frame to produce an extracted FCS parameter; a selector to select between the preset DR parameter and the extracted DR parameter based on the DR adaptation mode indicator to produce a selected DR parameter and select between the preset FCS parameter and the extracted FCS parameter based on the FCS adaptation mode indicator to produce a selected FCS parameter; and a generator to generate an acknowledgment to the received frame based on the selected DR parameter and the selected FCS parameter.

Abstract: An example method of assessing one more communication channels includes receiving an indication to initiate channel assessment, receiving a user-selected first set of assessment parameters, and determining whether or not the first communication channel is busy based on the first set of assessment parameters. The method also includes replacing the first set of assessment parameters with a user-selected second set of assessment parameters, and determining whether or not the second communication channel is busy based on the second set of assessment parameters.

Abstract: Systems, methods and circuits implementing a multi-protocol frame filter are disclosed. In some implementations, one or more programmable registers are configured to store frame filter data. A receiver is configured to receive an incoming frame. A multi-protocol frame filter is coupled to the one or more programmable registers and the receiver. The multi-protocol frame filter is configured for: comparing one or more fields of the incoming frame to the frame filter data, where the one or more fields are indicative of a wireless communications protocol; and determining, based on the comparing, to accept or discard the frame.

Abstract: Systems and techniques for adaptive automatic acknowledgment handling are described. A described system includes a memory structure to store a data rate (DR) adaptation mode indicator, a frame check sequence (FCS) adaptation mode indicator, a preset DR parameter, and a preset FCS parameter; an extractor to extract a DR parameter from a received frame to produce an extracted DR parameter and extract a FCS parameter from the received frame to produce an extracted FCS parameter; a selector to select between the preset DR parameter and the extracted DR parameter based on the DR adaptation mode indicator to produce a selected DR parameter and select between the preset FCS parameter and the extracted FCS parameter based on the FCS adaptation mode indicator to produce a selected FCS parameter; and a generator to generate an acknowledgment to the received frame based on the selected DR parameter and the selected FCS parameter.

Abstract: An example method of assessing one more communication channels includes receiving an indication to initiate channel assessment, receiving a user-selected first set of assessment parameters, and determining whether or not the first communication channel is busy based on the first set of assessment parameters. The method also includes replacing the first set of assessment parameters with a user-selected second set of assessment parameters, and determining whether or not the second communication channel is busy based on the second set of assessment parameters.

Abstract: A receiving circuit, method for receiving a signal, and use of a detection circuit and a control circuit of a receiving circuit of a node of a radio network is provided to deactivate an analog signal processing and/or determination of digital data from a signal received over an antenna of the node, when a stored current frame of the digital data has been recognized as valid, and to activate the analog signal processing and/or the determination, when the transmission of the current frame over an interface of the control circuit has been confirmed, whereby the control circuit is connected to the detection circuit and/or an input circuit for deactivation and activation, and whereby the detection circuit is formed to determine the digital data from the received signal.

Abstract: In certain embodiments, an apparatus includes circuitry coupled to a switch between a first and second antenna of a device. The circuitry generates a first control signal for the switch to couple a transceiver of the device to the first antenna for transmission of a first data frame. The circuitry determines whether the transceiver has received, within a pre-determined time interval after transmission of the first data frame, a second data frame containing an acknowledgement message confirming successful receipt of the first data frame by another device. The circuitry generates, if the transceiver has not received the second data frame within the pre-determined time interval, a second control signal for the switch to couple the transceiver to the second antenna for re-transmission of the first data frame. An output line of the apparatus couples the circuitry to the switch and communicates the first or second control signal to the switch.

Abstract: An example circuit includes a voltage regulator, a controller, and a chain of switches. The voltage regulator is configured to generate a supply voltage, the supply voltage connected to each switch in the chain of switches, and generate a supply voltage status signal, the supply voltage status signal indicating a status of the supply voltage. The chain of switches includes a first switch configured to switch the supply voltage to a first subcircuit of a plurality of sub circuits based on the supply voltage status signal and one or more second switches configured to switch the supply voltage to one or more respective subcircuits of the plurality of subcircuits.

Abstract: In one embodiment, a method includes receiving an instruction for a transceiver of a device to transmit a first data frame; in response to the instruction, generating a first control signal for a switch to couple the transceiver to a first antenna for transmission of the first data frame by the transceiver via the first antenna; determining whether the transceiver has received within a pre-determined time interval after the transmission of the first data frame a second data frame containing an acknowledgement message confirming successful receipt of the first data frame by another device; and, if the transceiver has not received within the pre-determined time interval after the transmission of the first data frame the second data frame, then generating a second control signal for the switch to couple the transceiver to the second antenna for re-transmission of the first data frame by the transceiver via a second antenna.

Abstract: In one embodiment, a method includes receiving an instruction for a transceiver of a device to transmit a first data frame; in response to the instruction, generating a first control signal for a switch to couple the transceiver to a first antenna for transmission of the first data frame by the transceiver via the first antenna; determining whether the transceiver has received within a pre-determined time interval after the transmission of the first data frame a second data frame containing an acknowledgement message confirming successful receipt of the first data frame by another device; and, if the transceiver has not received within the pre-determined time interval after the transmission of the first data frame the second data frame, then generating a second control signal for the switch to couple the transceiver to the second antenna for re-transmission of the first data frame by the transceiver via a second antenna.

Abstract: A circuit, an adjusting method, and use of a control loop for adjusting a data retention voltage and/or a leakage current of a CMOS circuit for a sleep mode, wherein the CMOS circuit is operated to control in a measuring mode, whereby in the measuring mode a leakage current exclusively flows through the CMOS circuit, the control loop in the measuring mode adjusts the data retention voltage and/or the leakage current, and the adjustments of the control loop for the sleep mode are stored.

Abstract: In one embodiment, a detection unit includes a sequence providing unit to provide a third group of derived sequences. The third group for each first pseudo noise (PN) sequence has a derived sequence assigned to the first PN sequence. The detection unit includes a correlation unit, which is connected to the sequence providing unit and formed to calculate correlation results by correlating the differentially demodulated signal with each derived sequence of the third group. The detection unit includes an evaluation unit, which is connected to the correlation unit and is formed to derive the values of the data symbols by evaluating the correlation results.

Abstract: A receiving circuit, method for receiving a signal, and use of a detection circuit and a control circuit of a receiving circuit of a node of a radio network is provided to deactivate an analog signal processing and/or determination of digital data from a signal received over an antenna of the node, when a stored current frame of the digital data has been recognized as valid, and to activate the analog signal processing and/or the determination, when the transmission of the current frame over an interface of the control circuit has been confirmed, whereby the control circuit is connected to the detection circuit and/or an input circuit for deactivation and activation, and whereby the detection circuit is formed to determine the digital data from the received signal.

Abstract: Circuit, process, and use of a memory for transmitting and/or receiving in a radio network, with a memory, which has a first interface for reading and writing and a second interface for reading and writing, with an arithmetic logic unit, which is connected to the first interface for reading and writing, with a control unit, which is connected to the second interface for reading and writing, and with a transmit/receive unit, which is connected to the control unit for writing received data via the second interface of the memory and for reading transmit data via the second interface of the memory.

Abstract: A receiving circuit, method for receiving a signal, and use of a detection circuit and a control circuit of a receiving circuit of a node of a radio network is provided to deactivate an analog signal processing and/or determination of digital data from a signal received over an antenna of the node, when a stored current frame of the digital data has been recognized as valid, and to activate the analog signal processing and/or the determination, when the transmission of the current frame over an interface of the control circuit has been confirmed, whereby the control circuit is connected to the detection circuit and/or an input circuit for deactivation and activation, and whereby the detection circuit is formed to determine the digital data from the received signal.

Abstract: Circuit, method for operating a circuit, and use, having a voltage regulator, which has a regulator output for providing a supply voltage, which for the supply can be connected to at least one first digital subcircuit via a first switch and to a second digital subcircuit via a second switch, wherein the voltage regulator is formed to output a first status signal dependent on the supply voltage, and to turn on the first switch by the first status signal is connected to a first control input of the first switch, and the first switch is formed to output a second status signal dependent on its switching state, and to turn on the second switch by the second status signal is connected to a second control input of the second switch.

Abstract: A circuit, an adjusting method, and use of a control loop for adjusting a data retention voltage and/or a leakage current of a CMOS circuit for a sleep mode, wherein the CMOS circuit is operated to control in a measuring mode, whereby in the measuring mode a leakage current exclusively flows through the CMOS circuit, the control loop in the measuring mode adjusts the data retention voltage and/or the leakage current, and the adjustments of the control loop for the sleep mode are stored.

Abstract: Circuit, method for operating a circuit, and use, having a voltage regulator, which has a regulator output for providing a supply voltage, which for the supply can be connected to at least one first digital subcircuit via a first switch and to a second digital subcircuit via a second switch, wherein the voltage regulator is formed to output a first status signal dependent on the supply voltage, and to turn on the first switch by the first status signal is connected to a first control input of the first switch, and the first switch is formed to output a second status signal dependent on its switching state, and to turn on the second switch by the second status signal is connected to a second control input of the second switch.

Abstract: A circuit, an adjusting method, and use of a control loop for adjusting a data retention voltage and/or a leakage current of a CMOS circuit for a sleep mode, wherein the CMOS circuit is operated to control in a measuring mode, whereby in the measuring mode a leakage current exclusively flows through the CMOS circuit, the control loop in the measuring mode adjusts the data retention voltage and/or the leakage current, and the adjustments of the control loop for the sleep mode are stored.

Abstract: In one embodiment, a detection unit includes a sequence providing unit to provide a third group of derived sequences. The third group for each first pseudo noise (PN) sequence has a derived sequence assigned to the first PN sequence. The detection unit includes a correlation unit, which is connected to the sequence providing unit and formed to calculate correlation results by correlating the differentially demodulated signal with each derived sequence of the third group. The detection unit includes an evaluation unit, which is connected to the correlation unit and is formed to derive the values of the data symbols by evaluating the correlation results.