Patents by Inventor Thomas K. Gender

Thomas K. Gender has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7089456
    Abstract: An error response test system and method with increased functionality and improved performance is provided. The error response test system provides the ability to inject errors into the application under test to test the error response of the application under test in an automated and efficient manner. The error response system injects errors into the application through a test mask variable. The test mask variable is added to the application under test. During normal operation, the test mask variable is set to allow the application under test to operate normally. During testing, the error response test system can change the test mask variable to introduce an error into the application under test. The error response system can then monitor the application under test to determine whether the application has the correct response to the error.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: August 8, 2006
    Assignee: Honeywell International, Inc
    Inventor: Thomas K. Gender
  • Patent number: 6895464
    Abstract: The present invention provides a flash memory management system and method with increased performance. The flash memory management system provides the ability to efficiently manage and allocate flash memory use in a way that improves reliability and longevity, while maintaining good performance levels. The flash memory management system includes a free block mechanism, a disk maintenance mechanism, and a bad block detection mechanism. The free block mechanism provides efficient sorting of free blocks to facilitate selecting low use blocks for writing. The disk maintenance mechanism provides for the ability to efficiently clean flash memory blocks during processor idle times. The bad block detection mechanism provides the ability to better detect when a block of flash memory is likely to go bad. The flash status mechanism stores information in fast access memory that describes the content and status of the data in the flash disk.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 17, 2005
    Assignee: Honeywell International Inc.
    Inventors: James Chow, Thomas K. Gender
  • Publication number: 20030226061
    Abstract: An error response test system and method with increased functionality and improved performance is provided. The error response test system provides the ability to inject errors into the application under test to test the error response of the application under test in an automated and efficient manner. The error response system injects errors into the application through a test mask variable. The test mask variable is added to the application under test. During normal operation, the test mask variable is set to allow the application under test to operate normally. During testing, the error response test system can change the test mask variable to introduce an error into the application under test. The error response system can then monitor the application under test to determine whether the application has the correct response to the error.
    Type: Application
    Filed: June 3, 2002
    Publication date: December 4, 2003
    Inventor: Thomas K. Gender
  • Publication number: 20030226062
    Abstract: An error response test system and method with increased functionality and improved performance is provided. The error response test system provides the ability to inject errors into the application under test to test the error response of the application under test in an automated and efficient manner. The error response test system injects asynchronous errors into the application under test by inserting code sequences of application code that are desired to create an error in the application under test. The error response test system inserts the error creation code directly into the object of the application under test. The inserted error creation code causes an error in the application under test at the specific point of insertion. The error creation code is designed to implement asynchronous errors that cannot normally be tested. Furthermore, the error creation code can be inserted in any location in the application under test.
    Type: Application
    Filed: June 3, 2002
    Publication date: December 4, 2003
    Inventors: Thomas K. Gender, James Chow
  • Publication number: 20030225961
    Abstract: The present invention provides a flash memory management system and method with increased performance. The flash memory management system provides the ability to efficiently manage and allocate flash memory use in a way that improves reliability and longevity, while maintaining good performance levels. The flash memory management system includes a free block mechanism, a disk maintenance mechanism, and a bad block detection mechanism. The free block mechanism provides efficient sorting of free blocks to facilitate selecting low use blocks for writing. The disk maintenance mechanism provides for the ability to efficiently clean flash memory blocks during processor idle times. The bad block detection mechanism provides the ability to better detect when a block of flash memory is likely to go bad. The flash status mechanism stores information in fast access memory that describes the content and status of the data in the flash disk.
    Type: Application
    Filed: June 3, 2002
    Publication date: December 4, 2003
    Inventors: James Chow, Thomas K. Gender