Patents by Inventor Thomas L. Ritzdorf
Thomas L. Ritzdorf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9234293Abstract: Processes and systems for electrolytically processing a microfeature workpiece with a first processing fluid and a counter electrode are described. Microfeature workpieces are electrolytically processed using a first processing fluid, a counter electrode, a second processing fluid, and an anion permeable barrier layer. The anion permeable barrier layer separates the first processing fluid from the second processing fluid while allowing certain anionic species to transfer between the two fluids.Type: GrantFiled: October 6, 2014Date of Patent: January 12, 2016Assignee: APPLIED Materials, Inc.Inventors: Rajesh Baskaran, Robert W. Batz, Jr., Bioh Kim, Thomas L. Ritzdorf, John Lee Klocke, Kyle M. Hanson
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Publication number: 20150083600Abstract: Processes and systems for electrolytically processing a microfeature workpiece with a first processing fluid and a counter electrode are described. Microfeature workpieces are electrolytically processed using a first processing fluid, a counter electrode, a second processing fluid, and an anion permeable barrier layer. The anion permeable barrier layer separates the first processing fluid from the second processing fluid while allowing certain anionic species to transfer between the two fluids.Type: ApplicationFiled: October 6, 2014Publication date: March 26, 2015Applicant: APPLIED Materials, Inc.Inventors: Rajesh Baskaran, Robert W. Batz, JR., Bioh Kim, Thomas L. Ritzdorf, John Lee Klocke, Kyle M. Hanson
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Publication number: 20140246324Abstract: Processes and systems for electrochemical deposition of a multi-component solder by processing a microfeature workpiece with a first processing fluid and an anode are described. Microfeature workpieces are electrolytically processed using a first processing fluid, an anode, a second processing fluid, and a cation permeable barrier layer. The cation permeable barrier layer separates the first processing fluid from the second processing fluid while allowing certain cationic species to transfer between the two fluids.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Applicant: APPLIED Materials, Inc.Inventors: Rajesh Baskaran, Robert W. Batz, JR., Bioh Kim, Thomas L. Ritzdorf, John L. Klocke, Kyle M. Hanson, Marvin L. Bernt, Ross Kulzer
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Publication number: 20100116671Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: ApplicationFiled: October 3, 2006Publication date: May 13, 2010Applicant: Semitool, Inc.Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7462269Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.Type: GrantFiled: June 20, 2001Date of Patent: December 9, 2008Assignee: Semitool, Inc.Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas
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Patent number: 7438788Abstract: An apparatus and method for electrochemical processing of microelectronic workpieces in a reaction vessel.Type: GrantFiled: March 29, 2005Date of Patent: October 21, 2008Assignee: Semitool, Inc.Inventors: Kyle M. Hanson, Thomas L. Ritzdorf, Gregory J. Wilson, Paul R. McHugh
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Patent number: 7332066Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: GrantFiled: February 7, 2005Date of Patent: February 19, 2008Assignee: Semitool, Inc.Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7300562Abstract: The present invention is directed to methods and compositions for depositing a noble metal alloy onto a microelectronic workpiece. In one particular aspect of the invention, a platinum metal alloy is electrochemically deposited on a surface of the workpiece from an acidic plating composition. The plated compositions when combined with high-k dielectric material are useful in capacitor structures.Type: GrantFiled: September 22, 2003Date of Patent: November 27, 2007Assignee: Semitool, Inc.Inventors: Zhongmin Hu, Thomas L. Ritzdorf, Lyndon W. Graham
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Patent number: 7264698Abstract: An apparatus and method for electrochemical processing of microelectronic workpieces in a reaction vessel.Type: GrantFiled: May 31, 2001Date of Patent: September 4, 2007Assignee: Semitool, Inc.Inventors: Kyle M. Hanson, Thomas L. Ritzdorf, Gregory J. Wilson, Paul R. McHugh
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Patent number: 7244677Abstract: A method for filling recessed micro-structures at a surface of a semiconductor wafer with metallization is set forth. In accordance with the method, a metal layer is deposited into the micro-structures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed micro-structures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties.Type: GrantFiled: February 4, 1998Date of Patent: July 17, 2007Assignee: Semitool. Inc.Inventors: Thomas L. Ritzdorf, Lyndon W. Graham
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Patent number: 7229543Abstract: A method for measuring a target constituent of an electroplating solution using an electroanalytical technique is set forth in which the electroplating solution includes one or more constituents whose by-products skew an initial electrical response to an energy input of the electroanalytical technique. The method comprises a first step in which an electroanalytical measurement cycle of the target constituent is initiated by providing an energy input to a pair of electrodes disposed in the electroplating solution. The energy input to the pair of electrodes is provided for at least a predetermined time period corresponding to a time period in which the electroanalytical measurement cycle reaches a steady-state condition. In a subsequent step, an electroanalytical measurement of the energy output of the electroanalytical technique is taken after the electroanalytical measurement cycle has reached the steady-state condition.Type: GrantFiled: February 26, 2003Date of Patent: June 12, 2007Assignee: Semitool, Inc.Inventors: Lyndon W. Graham, Thomas C. Taylor, Thomas L. Ritzdorf, Fredrick A. Lindberg, Bradley C. Carpenter
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Patent number: 7189318Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a mathematical model of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the mathematical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.Type: GrantFiled: May 24, 2001Date of Patent: March 13, 2007Assignee: Semitool, Inc.Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7161689Abstract: A processing apparatus for processing a microelectronic workpiece includes a metrology unit and a control, signal-connected to the metrology unit. The control can modify a process recipe or a process sequence of the processing apparatus based on a feed forward or a feed back signal from the metrology unit. A seed layer deposition tool, a process layer electrochemical deposition tool, and a chemical mechanical polishing tool, arranged for sequential processing of a workpiece, can be controlled as an integrated system using one or more metrology units. A metrology unit can be located at each tool to measure workpiece parameters. Each of the metrology units can be used as a feed forward control and/or a feed back control at each of the tools.Type: GrantFiled: October 14, 2003Date of Patent: January 9, 2007Assignee: Semitool, Inc.Inventors: Thomas L. Ritzdorf, Steve L. Eudy, Gregory J. Wilson, Paul R. McHugh
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Patent number: 7160421Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a mathematical model of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the mathematical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.Type: GrantFiled: May 24, 2001Date of Patent: January 9, 2007Assignee: Semitool, Inc.Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7144805Abstract: Methods for depositing a metal into a micro-recessed structure in the surface of a microelectronic workpiece are disclosed. The methods are suitable for use in connection with additive free as well as additive containing electroplating solutions. In accordance with one embodiment, the method includes making contact between the surface of the microelectronic workpiece and an electroplating solution in an electroplating cell that includes a cathode formed by the surface of the microelectronic workpiece and an anode disposed in electrical contact with the electroplating solution. Next, an initial film of the metal is deposited into the micro-recessed structure using at least a first electroplating waveform having a first current density. The first current density of the first electroplating waveform is provided to enhance the deposition of the metal at a bottom of the micro-recessed structure.Type: GrantFiled: July 1, 2004Date of Patent: December 5, 2006Assignee: Semitool, Inc.Inventors: LinLin Chen, Lyndon W. Graham, Thomas L. Ritzdorf, Dakin Fulton, Robert W. Batz, Jr.
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Patent number: 7115196Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: GrantFiled: February 27, 2003Date of Patent: October 3, 2006Assignee: Semitool, Inc.Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7102763Abstract: A method and apparatus for processing a microelectronic workpiece using metrology. The apparatus can include one or more processing or transport units, a metrology unit, and a control unit coupled to the metrology unit and at least one of the processing or transport units. The control unit can modify a process recipe or a process sequence of the processing unit based on a feed forward or a feed back signal from the metrology unit. The control unit can also provide instructions to the transport unit to move the workpiece to a selected processing unit. The processing unit can include, inter alia, a seed layer deposition unit, a process layer electrochemical deposition unit, a seed layer enhancement unit, a chemical mechanical polishing unit, and/or an annealing chamber arranged for sequential processing of a workpiece. The processing units can be controlled as an integrated system using one or more metrology units, or a separate metrology unit can provide input to the processing units.Type: GrantFiled: July 9, 2001Date of Patent: September 5, 2006Assignee: Semitool, Inc.Inventors: Thomas L. Ritzdorf, Steve L. Eudy, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Brian Aegerter, Curt Dundas, Steven L. Peace
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Patent number: 7020537Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a numerical of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the numerical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters.Type: GrantFiled: May 4, 2001Date of Patent: March 28, 2006Assignee: Semitool, Inc.Inventors: Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Patent number: 7001471Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.Type: GrantFiled: August 31, 1999Date of Patent: February 21, 2006Assignee: Semitool, Inc.Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas
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Patent number: 6994776Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.Type: GrantFiled: June 15, 2001Date of Patent: February 7, 2006Assignee: Semitool Inc.Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas