Patents by Inventor Thomas McDevitt
Thomas McDevitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080064189Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.Type: ApplicationFiled: October 31, 2007Publication date: March 13, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
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Publication number: 20070155164Abstract: A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or the wafer containing the structure) exits the vacuum environment of the sputter tool, the structure is warmed up to a temperature above the water condensation temperature of the environment outside the sputter tool. As a result, water vapor would not condense on the structure when the structure exits the sputter tool, and therefore, corrosion of the seed layer by the water vapor is prevented. Alternatively, a protective layer resistant to water vapor can be formed on top of the seed layer before the structure exits the sputter tool environment. In yet another alternative embodiment, the seed layer can comprises a copper alloy (such as with aluminum) which grows a protective layer resistant to water vapor upon exposure to water vapor.Type: ApplicationFiled: March 16, 2007Publication date: July 5, 2007Inventors: Steven Barkyoumb, Jonathan Chapple-Sokol, Edward Cooney, Keith Downes, Thomas McDevitt, William Murphy
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Publication number: 20070128848Abstract: A structure and method of fabricating a dual damascene interconnect structure, the structure including a dual damascene wire in a dielectric layer, the dual damascene wires extending a distance into the dielectric layer less than the thickness of the dielectric layer and dual damascene via bars integral with and extending from bottom surfaces of the dual damascene wires to a bottom surface of the dielectric layer.Type: ApplicationFiled: February 7, 2007Publication date: June 7, 2007Inventors: Thomas McDevitt, Anthony Stamper
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Publication number: 20070059920Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.Type: ApplicationFiled: November 1, 2006Publication date: March 15, 2007Inventors: Jeffrey Gambino, William Hill, Kenneth McAvey, Thomas McDevitt, Anthony Stamper, Arthur Winslow, Robert Zwonik
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Publication number: 20070040277Abstract: A method and structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.Type: ApplicationFiled: October 19, 2006Publication date: February 22, 2007Inventors: Jonathan Chapple-Sokol, Terence Hook, Baozhen Li, Thomas McDevitt, Christopher Ponsolle, Bette Reuter, Timothy Sullivan, Jeffrey Zimmerman
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Publication number: 20060269672Abstract: A method and an apparatus for performing the method. The method includes: (a) providing an apparatus, wherein the apparatus comprises (i) a chamber, (ii) a plasma device being in and coupled to the chamber, (iii) a shower head being in and coupled to the chamber, and (iv) a chuck being in and coupled to the chamber; (b) placing the substrate on the chuck; (c) using the plasma device to receive a plasma device gas and generate a plasma; (d) directing the plasma at a pre-specified area on the substrate; and (e) using the shower head to receive and distribute a shower head gas in the chamber, wherein the plasma device gas and the shower head gas are selected such that the plasma and the shower head gas when mixed with each other result in a chemical reaction that forms a film at the pre-specified area on the substrate.Type: ApplicationFiled: May 24, 2005Publication date: November 30, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jeffrey Gambino, Thomas McDevitt, Anthony Stamper
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Publication number: 20060163706Abstract: A method for connecting a microelectronic device to a wirebond comprises providing a substrate having a microelectronic circuit therein and forming a wiring layer over the substrate. The wiring layer includes a bilayer wiring structure comprising upper and lower electrically conductive layers separated by a protective electrically conductive layer. The lower layer of the bilayer structure is at the level of the wiring layer and the upper layer of the bilayer structure extends above the level of the wiring layer. The bilayer wiring structure is formed by depositing the upper and lower electrically conductive layers separated by a protective electrically conductive layer over the substrate, etching the upper electrically conductive layer and a portion of the protective electrically conductive layer, and thereafter separately etching the lower electrically conductive layer to form the wiring layer over the substrate. The method also includes connecting a wirebond to the upper layer of the bilayer structure.Type: ApplicationFiled: January 25, 2005Publication date: July 27, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen Luce, Thomas McDevitt, Anthony Stamper
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Publication number: 20060099775Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.Type: ApplicationFiled: December 22, 2005Publication date: May 11, 2006Applicant: International Business Machines CorporationInventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
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Publication number: 20060063373Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.Type: ApplicationFiled: September 20, 2004Publication date: March 23, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jeffrey Gambino, William Hill, Kenneth McAvey, Thomas McDevitt, Anthony Stamper, Arthur Winslow, Robert Zwonik
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Publication number: 20060027929Abstract: Methods and structures having pore-closing layers for closing exposed pores in a patterned porous low-k dielectric layer, and optionally a reactive liner on the low-k dielectric. A first reactant is absorbed or retained in exposed pores in the patterned dielectric layer and then a second reactant is introduced into openings such that it enters the exposed-pores, while first reactant molecules are simultaneously being outgassed. The second reactant reacts in-situ with the outgassed first reactant molecules at a mouth region of the exposed pores to form the pore-closing layer across the mouth region of exposed pores, while retaining a portion of each pore's porosity to maintain characteristics and properties of the porous low-k dielectric layer. Optionally, the first reactant may be adsorbed onto the low-k dielectric such that upon introduction of the second reactant Into the patterned dielectric openings, a reactive liner is also formed on the low-k dielectric.Type: ApplicationFiled: October 11, 2005Publication date: February 9, 2006Inventors: Edward Cooney, John Fitzsimmons, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, Lee Nicholson, Anthony Stamper
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Publication number: 20060012052Abstract: A structure and method of fabricating a dual damascene interconnect structure, the structure including a dual damascene wire in a dielectric layer, the dual damascene wires extending a distance into the dielectric layer less than the thickness of the dielectric layer and dual damascene via bars integral with and extending from bottom surfaces of the dual damascene wires to a bottom surface of the dielectric layer.Type: ApplicationFiled: July 14, 2004Publication date: January 19, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas McDevitt, Anthony Stamper
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Publication number: 20050266698Abstract: Methods and structures having pore-closing layers for closing exposed pores in a patterned porous low-k dielectric layer, and optionally a reactive liner on the low-k dielectric. A first reactant is absorbed or retained in exposed pores in the patterned dielectric layer and then a second reactant is introduced into openings such that it enters the exposed pores, while first reactant molecules are simultaneously being outgassed. The second reactant reacts in-situ with the outgassed first reactant molecules at a mouth region of the exposed pores to form the pore-closing layer across the mouth region of exposed pores, while retaining a portion of each pore's porosity to maintain characteristics and properties of the porous low-k dielectric layer. Optionally, the first reactant may be adsorbed onto the low-k dielectric such that upon introduction of the second reactant into the patterned dielectric openings, a reactive liner is also formed on the low-k dielectric.Type: ApplicationFiled: May 26, 2004Publication date: December 1, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Edward Cooney, John Fitzsimmons, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, Lee Nicholson, Anthony Stamper
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Publication number: 20050253265Abstract: A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or the wafer containing the structure) exits the vacuum environment of the sputter tool, the structure is warmed up to a temperature above the water condensation temperature of the environment outside the sputter tool. As a result, water vapor would not condense on the structure when the structure exits the sputter tool, and therefore, corrosion of the seed layer by the water vapor is prevented. Alternatively, a protective layer resistant to water vapor can be formed on top of the seed layer before the structure exits the sputter tool environment. In yet another alternative embodiment, the seed layer can comprises a copper alloy (such as with aluminum) which grows a protective layer resistant to water vapor upon exposure to water vapor.Type: ApplicationFiled: May 13, 2004Publication date: November 17, 2005Applicant: International Business Machines CorporationInventors: Steven Barkyoumb, Jonathan Chapple-Sokol, Edward Cooney, Keith Downes, Thomas McDevitt, William Murphy
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Publication number: 20050194689Abstract: A method and structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.Type: ApplicationFiled: March 6, 2004Publication date: September 8, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jonathan Chapple-Sokol, Terence Hook, Baozhen Li, Thomas McDevitt, Christopher Ponsolle, Bette Reuter, Timothy Sullivan, Jeffrey Zimmerman
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Publication number: 20050101114Abstract: Disclosed is a conductive fuse for a semiconductor device, comprising: a pair of contact portions integrally connected to a fusible portion by connecting portions; the contact portions thicker than the connecting portions and the connecting portions thicker than the fusible portion; a first dielectric under the connecting portions and the fusible portion and extending between the pair of contact portions; and a second dielectric between the first dielectric and the fusible portion, the second dielectric extending between the connecting portions and defining the length of the fusible portion.Type: ApplicationFiled: September 30, 2003Publication date: May 12, 2005Inventors: Timothy Daubenspeck, Thomas McDevitt, William Motsiff, Anthony Stamper
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Publication number: 20050026397Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.Type: ApplicationFiled: July 28, 2003Publication date: February 3, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins