Patents by Inventor Thomas Stockmeier

Thomas Stockmeier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070227767
    Abstract: A connecting device for the electrically conductive connection of electronic components and a substrate. The connecting device is formed as a film composite formed of at least one insulating film and at least two electrically conductive films disposed on opposite sides of the insulating film. The film composite is formed as a layer construction of a conductive film alternating with an insulating film, wherein at least one conductive film is structured and thus forms conductor tracks. Furthermore, at least one conductive film of a main area of the film composite is made of a first metal and has at least one film section having a layer of a second metal that is thinner in comparison with the thickness of the first layer.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 4, 2007
    Inventors: Christian Gobl, Karlheinz Augustin, Thomas Stockmeier
  • Patent number: 7227259
    Abstract: A circuit arrangement for a power semiconductor module provides low parasitic inductances and low loss. An electrically insulating substrate supports metallic ribbon connectors which in turn power attached semiconductor components. DC port conducts are positioned in close proximity to each other and are arranged in at least one partial sector parallel and in close proximity to the surface of the substrate and/or the ribbon connectors and electrically insulated from the same, and at least one AC port conductor is similarly attached. The port conductors include surface elements enabling simplified low-inductance wire bond connection from the port conductors to either the power semiconductor components or ribbon connectors or both.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: June 5, 2007
    Assignee: Semikron Elektronik GmbH & Co. KG
    Inventors: Heinrich Heilbronner, Thomas Stockmeier
  • Patent number: 7164201
    Abstract: A power semiconductor module with a scalable construction, having a base plate or intended for direct mounting on a heat sink. The module has a framelike housing, a cover, terminal elements, extending to the outside of the housing for load contacts and auxiliary contacts. The module having at least two electrically insulating substrates disposed inside the housing, which in turn each comprise one insulating body and a plurality of metal conducting tracks, located on the first main face of the insulating body, which first main face is remote from the base plate or the heat sink. The metal connecting tracks are electrically insulated from one another, and power semiconductor components are located on and electrically connected to these connecting tracks. The substrates (50) are identical, and electrically connected to one another, and have the same type and number of power semiconductor components disposed thereon.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: January 16, 2007
    Assignee: Semikron Elektronik & Co. KG
    Inventors: Yvonne Manz, Jürgen Steger, Thomas Stockmeier
  • Publication number: 20060087260
    Abstract: Presented is an integrated circuit configuration for triggering single power semiconductor switches, or power semiconductor switches in half-bridge configuration. The circuit configuration consists of a first integrated trigger chip having a plurality of function groups comprising at least one first level shifter for a switch at higher potential and at least one second integrated trigger chip having a plurality of function groups comprising at least one second level shifter and a driver for this switch. The at least one trigger chip is connected downstream of the first trigger chip, the ground potential of the second trigger chip is at the output potential of the level shifter of the first trigger chip, and the trigger chips are arranged in a common housing with suitable isolation of the trigger chips against each other.
    Type: Application
    Filed: October 11, 2005
    Publication date: April 27, 2006
    Inventors: Reinhard Herzer, Thomas Stockmeier
  • Patent number: 6958534
    Abstract: A power semiconductor module has a base plate comprising a framelike housing, a cap, and at least one electrically insulated substrate disposed inside the housing. The substrate comprises an insulation body with a plurality of metal connection tracks located thereon and insulated from one another, power semiconductor components located on the connection tracks, and terminal elements leading to the outside of the power semiconductor module for load and auxiliary contacts. Some of these terminal elements in the interior of the power semiconductor module comprise contact springs, which are disposed between the connection tracks and contact points on a printed circuit board. The printed circuit board has conductor tracks, which connect the contact points to contact elements that lead to the outside of the power semiconductor module.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: October 25, 2005
    Assignee: Semikron Elektronik GmbH
    Inventors: Thomas Stockmeier, Jürgen Steger
  • Publication number: 20050035439
    Abstract: A power semiconductor module with a scalable construction, having a base plate or intended for direct mounting on a heat sink. The module has a framelike housing, a cover, terminal elements, extending to the outside of the housing for load contacts and auxiliary contacts. The module having at least two electrically insulating substrates disposed inside the housing, which in turn each comprise one insulating body and a plurality of metal conducting tracks, located on the first main face of the insulating body, which first main face is remote from the base plate or the heat sink. The metal connecting tracks are electrically insulated from one another, and power semiconductor components are located on and electrically connected to these connecting tracks. The substrates (50) are identical, and electrically connected to one another, and have the same type and number of power semiconductor components disposed thereon.
    Type: Application
    Filed: July 23, 2004
    Publication date: February 17, 2005
    Inventors: Yvonne Manz, Jurgen Steger, Thomas Stockmeier
  • Publication number: 20050024805
    Abstract: A circuit arrangement for a power semiconductor module provides low parasitic inductances and low loss. An electrically insulating substrate supports metallic ribbon connectors which in turn power attached semiconductor components. DC port conducts are positioned in close proximity to each other and are arranged in at least one partial sector parallel and in close proximity to the surface of the substrate and/or the ribbon connectors and electrically insulated from the same, and at least one AC port conductor is similarly attached. The port conductors include surface elements enabling simplified low-inductance wire bond connection from the port conductors to either the power semiconductor components or ribbon connectors or both.
    Type: Application
    Filed: August 18, 2003
    Publication date: February 3, 2005
    Inventors: Heinrich Heilbronner, Thomas Stockmeier
  • Publication number: 20040245548
    Abstract: A power semiconductor module has a base plate comprising a framelike housing, a cap, and at least one electrically insulated substrate disposed inside the housing. The substrate comprises an insulation body with a plurality of metal connection tracks located thereon and insulated from one another, power semiconductor components located on the connection tracks, and terminal elements leading to the outside of the power semiconductor module for load and auxiliary contacts. Some of these terminal elements in the interior of the power semiconductor module comprise contact springs, which are disposed between the connection tracks and contact points on a printed circuit board. The printed circuit board has conductor tracks, which connect the contact points to contact elements that lead to the outside of the power semiconductor module.
    Type: Application
    Filed: April 9, 2004
    Publication date: December 9, 2004
    Applicant: SEMIKRON Elektronik GmbH
    Inventors: Thomas Stockmeier, Jurgen Steger
  • Publication number: 20040099948
    Abstract: The invention relates to a power semiconductor module mounted with a base plate or directly mounted on a heat sink, including a packaging, at least one power semiconductor component and at least one substrate provided on both sides with a metallic layer. The at least one power semiconductor component is arranged on the first metallic layer. The second metallic layer is arranged on the second main surface of the substrate. On the first main surface of the substrate an additional conductive layer is arranged around the edge of the substrate and is electroconductively connected with the metallic layer on the second main surface of the substrate.
    Type: Application
    Filed: October 6, 2003
    Publication date: May 27, 2004
    Inventor: Thomas Stockmeier
  • Patent number: 5982031
    Abstract: The present invention discloses a power semiconductor module 10 having encapsulated submodules 1 which, for example, is suitable for power switches, rectifiers for the like in industrial or traction drives. The submodules 1 have a sandwiched structure made up of a ceramic substrate, one or a few power semiconductor chips and a molybdenum wafer, and are potted in plastic. They are held in plug-in locations 19 on a common baseplate 11 and make contact via a stack arrangement of conductors 12, 14, 18. Retention and contact of the submodules 1 take place reversibly via pressure contacts 15, 16, 20, clamp contacts 21 or the like. Important advantages of the power semiconductor module 10 relate to the simple and easily scaleable structure, improved ability to withstand thermal load cycles, and the robustness and easy interchangeability of the submodules.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: November 9, 1999
    Assignee: Asea Brown Boveri AG
    Inventor: Thomas Stockmeier
  • Patent number: 5811878
    Abstract: In a high-power semiconductor module (10), in which a plurality of first submodules (13, 14, 16, 17) are arranged in an electrically insulated manner in a common housing (12) and on a common cold plate (11) and are interconnected with one another, the first submodules (13, 14, 16, 17) each ?lacuna! individual controllable power semiconductor switches (13a), short-circuit-proof operation in conjunction with relatively high switching frequencies is made possible, with a relatively low current-carrying capacity and an increased withstand voltage, by virtue of the fact that the first submodules (13, 14, 16, 17) are connected in series within the module for the purpose of increasing the withstand voltage.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: September 22, 1998
    Assignee: Asea Brown Boveri AG
    Inventors: Martti Harmoinen, Thomas Stockmeier
  • Patent number: 5661315
    Abstract: In the case of a controllable power semiconductor component, which comprises at least one planar, essentially rectangular power semiconductor chip (13), which power semiconductor chip (13) has on its top side a large-area metallization layer (14) for the large-area electrical connection to a metal mating element (17, 19), and also a separate small-area connection region for the gate connection in the form of a gate pad (16), a simplified form of the metal mating element (17, 19) and adjustment thereof are achieved by virtue of the fact that the gate pad (16) is arranged in a corner of the power semiconductor chip (13).
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: August 26, 1997
    Assignee: Asea Brown Boveri AG
    Inventors: Friedhelm Bauer, Reinhold Bayerer, Thomas Stockmeier
  • Patent number: 5635757
    Abstract: A circuit arrangement and a power semiconductor module are provided in which the circuit arrangement comprises a plurality of parallel-connected power semiconductor modules, of which only one is connected to a control device. The other modules function as slaves of the master connected to the control device and draw the signal required for triggering from the master via a signal bus. For this purpose, the power semiconductor modules have a number of signal connections which are interconnected. The signal connections may be connected signalwise to the gate connections, for example via an interface. The power semiconductor modules according to the invention provide a circuit arrangement in which a plurality of modules can be connected in parallel up to maximum performances without limitations.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: June 3, 1997
    Assignee: Asea Brown Boveri AG
    Inventors: Thomas Stockmeier, Uwe Thiemann
  • Patent number: 5587594
    Abstract: To provide thermal relief, particularly of the edge of disk-shaped gate-turn-off GTO thyristors (GTO) as are used in converters in power electronics, at least one cooling segment which is isolated from a GTO cathode metallization of the GTO thyristor segment (GTO) by a gate electrode metallization of a gate electrode is arranged on the edge and laterally adjacent to the GTO thyristor segment (GTO). An insulation layer is provided between a cooling segment metallization and the gate electrode metallization. Cooling segments in an lo outer annular zone can be alternately arranged with GTO thyristor segments (GTO) or offset towards the outside in the radial direction or perpendicular direction thereto. Instead of cooling segments, a p.sup.+ -type GTO emitter layer of the GTO thyristor segments (GTO) can be shortened at the edge in the outer annular zone.
    Type: Grant
    Filed: January 20, 1995
    Date of Patent: December 24, 1996
    Assignee: ABB Management AG
    Inventors: Andre Jaecklin, Ezatollah Ramezani, Peter Roggwiller, Andreas Ruegg, Thomas Stockmeier, Peter Streit, Jurg Waldmeyer
  • Patent number: 5574312
    Abstract: In the case of a power semiconductor module (1) according to the invention, substrates (8) having a power semiconductor assembly (2) are fitted on both sides of a heat sink (3). The power semiconductor assemblies (2) are made contact with by a stack of contact laminates (4), which contact laminates (4) run parallel to the heat sink (3). A very low-inductance structure is obtained thereby.
    Type: Grant
    Filed: May 5, 1995
    Date of Patent: November 12, 1996
    Assignee: ABB Management AG
    Inventors: Reinhold Bayerer, Thomas Stockmeier
  • Patent number: 5541453
    Abstract: A power semiconductor module includes a housing having a baseplate, on which at least one power semiconductor switching element is arranged, the power semiconductor switching element having at least two power electrodes connected to corresponding power connections, the power connections extending parallel to the base plate and passing out of the housing parallel to the base plate, thereby extending above one another in a plurality of planes and being connected to the corresponding power electrodes of the power semiconductor switching element by connecting wires, the power semiconductor module including a plurality of control and auxiliary connections wherein the control and auxiliary connections are passed out of the housing at right angles to the base plate and the control and auxiliary connections are designed for plugging into the control unit driving the module, and the power semiconductor module including fastening mechanisms provided on the housing and fixing the control unit on the housing of the modul
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: July 30, 1996
    Assignee: ABB Semiconductors, Ltd.
    Inventors: Thomas Stockmeier, Uwe Thiemann, Reinheld Bayerer
  • Patent number: 5449938
    Abstract: A power semiconductor component having integrated protection against electrostatic destruction is published. Such a semiconductor component (1) comprises a semiconductor substrate (10) having at least one MOS structure whose gate (7) is arranged insulated from the semiconductor substrate (10). Such structures are susceptible to destruction by a dielectric breakdown of the insulation layer, caused by electrostatic charging. According to the invention, this insulating layer between-the gate electrode (3) and the main electrode (2) is now replaced by a semi-insulating layer (9) so that a limited current flow becomes possible between the gate (7) and the main electrode (2) and it is no longer possible for any potential difference to build up.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: September 12, 1995
    Assignee: ABB Management Ltd.
    Inventors: Thomas Stockmeier, Uwe Thiemann
  • Patent number: 5311043
    Abstract: In a bidirectional semiconductor switch which can be switched on and off, printed conductors which form the main term terminals (1, 2) and the control terminals (3, 4) are applied to a baseplate (9). Applied to the printed conductors, which form the main terminals (1, 2), are at least two reverse-blocking semiconductor components (5a-h) which can be switched on and off. The control electrodes (8a, 8e) and the second main electrodes (7a, 7e) of the semiconductor components (5a-h) are interconnected in such a way that the semiconductor switch has the required bidirectional switching function.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 10, 1994
    Assignee: Asea Brown Boveri Ltd.
    Inventor: Thomas Stockmeier
  • Patent number: 5286981
    Abstract: A turn-off power semiconductor component subdivided into unit cells (EZ), including between an anode (A) and a cathode (K) in a semiconductor substrate (1) five layers in p-n-p-n-p sequence, namely an anode layer (10) an n-type base layer (9), a p-type base layer (8), a turn-off region (6), a cathode region (7) adjoining the turn-off region, and a p-doped short-circuit region (5). On the cathode side in every unit cell (EZ), a first MOSFET (M1) which can be driven via a first insulated gate electrode (G1) is provided for the purpose of switching between the five-layer structure and a conventional thyristor four-layer structure. A second MOSFET (M2) having a second gate electrode (G2) prevents a breakdown between the p-type short-circuit region (5) and the turn-off region (6) during turn-off.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: February 15, 1994
    Assignee: ASEA Brown Boveri Ltd.
    Inventors: Klas Lilja, Kenneth Johansson, Thomas Stockmeier
  • Patent number: 5221851
    Abstract: In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity of small-area semiconductor chips (7) which are accommodated alongside one another in a common housing (13) and connected in parallel. This achievement avoids problems of yield with structures which are becoming finer.
    Type: Grant
    Filed: February 4, 1992
    Date of Patent: June 22, 1993
    Assignee: Asea Brown Boveri Ltd.
    Inventors: Jens Gobrecht, Thomas Stockmeier