Abstract: Images of a scene may be captured by a set of image capture devices. Overlapping areas of the images may be identified based on the topology of the set of image capture devices. Frontiers within the overlapping areas of the images may be identified based on borders of the images. Sample points for the images may be distributed along the frontiers. Warp parameters including an anti-symmetric warping portion and a symmetric warping portion may be determined at the sample points. Displacement values may be determined at the sample points based on the warp parameters. Warp maps for the images may be determined based on diffusion of the displacement values. Displacement maps for the images may be determined based on interpolation of the warp maps. The images may be modified based on the displacement maps.

Abstract: Multiple video segments, including multiple frames, may be obtained. The video segments may be time synchronized for at least portions of the video segments captured during a synchronized time period. A first key frame moment may be set with the synchronized time period. A first set of construction parameter values may be determined for the frames captured during the first key frame moment. A first set of spherical images may be constructed using the first set of construction parameter values. A change may be detected in the construction parameter values at a moment in time subsequent to the first key frame moment, which may be identified as a second key frame moment. A second set of construction parameter values may be determined for the frames captured during the second key frame moment. The second set of spherical images may be constructed using the second set of construction parameter values.

Abstract: Within an Electronic Design Automation (EDA) tool, a method of macro inference can include translating a hardware description language (HDL) template into a macro template and translating a circuit design into a format corresponding to the macro template. The method further can include matching a portion of the translated circuit design with the macro template and replacing the portion of the circuit design matching the macro template with a macro associated with the macro template. The resulting updated circuit design is then output, e.g., to a user, a computer file, or another EDA tool.