Abstract: An apparatus to compensate for loss in a transmission path includes a circuit block that incorporates time constants into a signal transmitted via the transmission path. The time constants counteract at least part of inherent time constants that contribute to loss in the transmission path. The circuit block includes a resistive circuit and a capacitive circuit. The capacitive circuit and the resistive circuit together contribute to the time constants. The capacitive circuit includes plural capacitors that are each switchable via the circuit block. An amount of compensation provided by the apparatus corresponds, at least in part, to the loss in the transmission path.

Abstract: Circuitry includes a multiplexer to output first data and second data in response to a clock signal, the clock signal having rising and falling clock edges, where the multiplexer outputs first data at a rising clock edge and outputs second data at a falling clock edge. The circuitry includes a DAC to receive the first data and the second data and to generate, therefrom, complementary first and second signals, a filter to filter the complementary first signals and second signals and thereby produce first and second filtered signals, and a voltmeter to measure a difference between the first and second filtered signals, the difference corresponding to a duty cycle error in the clock signal.

Abstract: A driver circuit for automatic test equipment provides high voltage range and high frequency. The driver circuit includes a voltage buffer that has high voltage swing and is capable of dynamically generating an output voltage that alternates between two statically established voltage levels. The driver circuit also includes a current buffer that has high speed and is capable of dynamically generating an output current that alternates between two statically established current levels. The voltage buffer and the current buffer each have an output, and the output of the voltage buffer is coupled to the output of the current buffer through a series impedance. The output of the current buffer is also coupled to a device under test (DUT). A control circuit directs the voltage buffer and the current buffer to generate either static or dynamic output signals.

Abstract: A novel pin electronics design and method is taught which serves to minimize the capacitive loading of the driver and load portion of the pin electronics. The driver and load circuitry are combined to form a novel driver/load circuit, thereby reducing capacitive loading, simplifying circuit structure, and improving the speed of operation of the test system and the accuracy of the test.