Abstract: The disclosure provides a display substrate and a method of fabricating the same, and a display panel. The display substrate includes: a substrate; a transistor structure on the substrate; a flexible circuit board having one end coupled to the transistor structure, and the other end capable of being bent to a side of the substrate away from the transistor structure; and a blocking conductive layer on the flexible circuit board and configured to block an interference electric field in an external environment from affecting the display substrate.

Abstract: Disclosed are an array substrate, a display panel and a driving method thereof. As the control unit is provided between the first electrode and the test circuit, when the panel is subsequently tested, the control unit may provide the circuit control signal received by the first electrode to the test circuit under the control of the third electrode, so as to detect whether the panel is qualified by using the test circuit. During subsequent display, the control unit may be used to cut off the first electrode from the test circuit, and fundamentally cut off the connection between the first electrode, and the test circuit and a flexible printed circuit, so that a display abnormality does not occur even if the first electrode is short-circuited.

Abstract: Provided is a back light unit, a display unit and a display apparatus. The back light unit is configured to be disposed on a side of a display panel away from a display side, and includes a back plate and a plastic frame. The back plate includes a bottom plate and a side plate connected to an edge of the bottom plate, and a step is formed on an inner side of the side plate. The step has a first side away from the bottom plate and a second side away from an outer side of the side plate. The plastic frame is supported on the first side surface of the step, and a supporting part is disposed on an end surface of the side plate away from the bottom plate.

Abstract: The disclosure provides a display substrate and a method of fabricating the same, and a display panel. The display substrate includes: a substrate; a transistor structure on the substrate; a flexible circuit board having one end coupled to the transistor structure, and the other end capable of being bent to a side of the substrate away from the transistor structure; and a blocking conductive layer on the flexible circuit board and configured to block an interference electric field in an external environment from affecting the display substrate.

Abstract: A chip programming voltage detection circuit and a chip programming voltage detection method are disclosed. The chip programming voltage detection circuit comprises a detection subcircuit and a warning subcircuit. The detection subcircuit detects a voltage at a programming voltage output pin, and outputs a detection signal based on the voltage at the programming voltage output pin. The warning subcircuit is connected to a detection output terminal of the detection subcircuit, and is operated to issue a warning alarm in a case where the detection signal indicates that the voltage at the programming voltage output pin does not reach a voltage required for an IC chip programming.

Abstract: Provided is a back light unit, a display unit and a display apparatus. The back light unit is configured to be disposed on a side of a display panel away from a display side, and includes a back plate and a plastic frame. The back plate includes a bottom plate and a side plate connected to an edge of the bottom plate, and a step is formed on an inner side of the side plate. The step has a first side away from the bottom plate and a second side away from an outer side of the side plate. The plastic frame is supported on the first side surface of the step, and a supporting part is disposed on an end surface of the side plate away from the bottom plate.

Abstract: A switch timing controlling circuit includes a first timing controlling circuit including a first inverting sub-circuit configured to form a first inverting signal that is inverted from an initial signal having a first level as an inactive level and a second level as an active level input from an initial signal terminal; a first delaying sub-circuit configured to delay a time point of the first inverting signal at which the first inverting signal changes from the first level to the second level to form a first delaying signal; and a second inverting sub-circuit configured to form a reset signal inverted from the first delaying signal; and a second timing controlling circuit including a second delaying sub-circuit configured to delay a time point of the initial signal at which the initial signal changes from the first level to the second level to form a display control signal.

Abstract: A chip programming voltage detection circuit and a chip programming voltage detection method are disclosed. The chip programming voltage detection circuit comprises a detection subcircuit and a warning subcircuit. The detection subcircuit detects a voltage at a programming voltage output pin, and outputs a detection signal based on the voltage at the programming voltage output pin. The warning subcircuit is connected to a detection output terminal of the detection subcircuit, and is operated to issue a warning alarm in a case where the detection signal indicates that the voltage at the programming voltage output pin does not reach a voltage required for an IC chip programming.

Abstract: This application discloses a display device. The display device includes a display module, a frame surrounding the sides of the display module, a backlight module stacked with the display module, and a backplane. The frame includes holes. The backplane includes a main plane, side walls, and protrusions. The main plane is located on a side of the backlight module away from the display module. The side walls extend from the edges of the main plane toward the display module and are perpendicular to the main plane. The protrusions are located on the side walls and each of the protrusions is embedded in a corresponding one of the holes of the frame.

Abstract: This application discloses a display device. The display device includes a display module, a frame surrounding the sides of the display module, a backlight module stacked with the display module, and a backplane. The frame includes holes. The backplane includes a main plane, side walls, and protrusions. The main plane is located on a side of the backlight module away from the display module. The side walls extend from the edges of the main plane toward the display module and are perpendicular to the main plane. The protrusions are located on the side walls and each of the protrusions is embedded in a corresponding one of the holes of the frame.

Abstract: A switch timing controlling circuit includes a first timing controlling circuit including a first inverting sub-circuit configured to form a first inverting signal that is inverted from an initial signal having a first level as an inactive level and a second level as an active level input from an initial signal terminal; a first delaying sub-circuit configured to delay a time point of the first inverting signal at which the first inverting signal changes from the first level to the second level to form a first delaying signal; and a second inverting sub-circuit configured to form a reset signal inverted from the first delaying signal; and a second timing controlling circuit including a second delaying sub-circuit configured to delay a time point of the initial signal at which the initial signal changes from the first level to the second level to form a display control signal.

Abstract: A pixel unit driving circuit and a method thereof, a pixel unit and a display apparatus can improve uniformity in the brightness of an OLED panel. The pixel unit driving circuit includes a driving thin film transistor, a matching thin film transistor, a signal-erasing thin film transistor, a charging control unit, a driving control unit and a storage capacitor, wherein a gate of the driving thin film transistor is connected with a high level output terminal of a driving power supply via the charging control unit, a source thereof is connected with the high level output terminal of the driving power supply, and a drain thereof is connected with an anode of an OLED; a gate and a source of the matching thin film transistor are connected with a data line via the charging control unit, and a drain thereof is connected with a second end of the storage capacitor.

Abstract: Provided are a pixel driving circuit, a driving method thereof and a display apparatus. The pixel driving circuit includes an electroluminescent element, a driving transistor, a switch unit, a charging unit, a compensation unit, a cutoff unit and a storage unit. The pixel driving circuit charges the storage capacitor by the charging unit first, and then uses the method of charging first and discharging later to make the voltage in the storage capacitor match the driving current quickly to perform fast compensation of the threshold voltage Vth, and thus make the driving current provided by the driving transistor not influenced by the threshold voltage Vth, thereby raising the consistency of the driving currents and improving the uniformity of brightness.

Abstract: A pixel circuit and driving method, display apparatus, the circuit comprises: light-emitting device; driving transistor; first switch-transistor whose source and drain are connected respectively with the gate and drain of the driving transistor; third switch-transistor, whose drain is connected with the light-emitting device, and source is connected with the drain of the driving transistor; storage capacitor, whose first terminal is connected with the gate of the driving transistor; second switch-transistor, whose drain is connected with the second terminal of the storage capacitor, and source is connected with the common connection terminal; fourth switch-transistor, whose source is connected with the second terminal of the storage capacitor; fifth switch-transistor, whose drain is connected with data signal terminal, and source is connected with the drain of the fourth switch-transistor; and first capacitor, whose first terminal is connected with the source of the fifth switch-transistor, and second termina

Abstract: A pixel unit driving circuit and a method thereof, a pixel unit and a display apparatus can improve uniformity in the brightness of an OLED panel. The pixel unit driving circuit includes a driving thin film transistor, a matching thin film transistor, a signal-erasing thin film transistor, a charging control unit, a driving control unit and a storage capacitor, wherein a gate of the driving thin film transistor is connected with a high level output terminal of a driving power supply via the charging control unit, a source thereof is connected with the high level output terminal of the driving power supply, and a drain thereof is connected with an anode of an OLED; a gate and a source of the matching thin film transistor are connected with a data line via the charging control unit, and a drain thereof is connected with a second end of the storage capacitor.

Abstract: A pixel unit driving circuit and a method thereof, a pixel unit and a display apparatus can improve uniformity in the brightness of an OLED panel. The pixel unit driving circuit comprises a driving thin film transistor (DTFT), a matching thin film transistor (MTFT), a signal-erasing thin film transistor (ETFT), a charging control unit (31), a driving control unit (32) and a storage capacitor (Cs). A gate of the driving thin film transistor (DTFT) is connected with a first end of the storage capacitor (Cs) and is connected with a driving power supply (VDD) via the charging control unit (32), a source thereof is connected with a driving power supply (VSS), and a drain thereof is connected with the OLED.

Abstract: A pixel circuit and driving method thereof, display apparatus, the pixel circuit comprises: light-emitting device; driving transistor (DTFT); first switch-transistor (T1) whose source is connected with the gate of the driving transistor (DTFT), and drain is connected with the drain of the driving transistor (DTFT); third switch-transistor (T3), whose drain is connected with the light-emitting device, source is connected with the drain of the driving transistor (DTFT); storage capacitor (Cst), whose first terminal (G) is connected with the gate of the driving transistor (DTFT); second switch-transistor (T2), whose drain is connected with the second terminal (P) of the storage capacitor (Cst), and source is connected with the common connection terminal (VSS); fourth switch-transistor (T4), whose source is connected with the second terminal (P) of the storage capacitor; fifth switch-transistor (T5), whose drain is connected with data signal terminal (Vdata), and source is connected with the drain of the fourth s

Abstract: The present invention discloses array substrate, display device and method for controlling refresh rate of an array substrate. The array substrate includes; a plurality of pixel structures each including gate line, data line, common electrode line, first switching element at intersection of the gate line and the data line, pixel electrode, second switching element, and first transparent electrode. Gate, source and drain of the first switching element are connected to the gate line, the date line and the pixel electrode, respectively. Gate, source and drain of the second switching element are connected to second switching controlling line, common electrode signal terminal and the first transparent electrode, respectively. A first storage capacitance is formed between the pixel electrode and the common electrode line and/or between the pixel electrode and the gate line, and a second storage capacitance is formed between the pixel electrode and the first transparent electrode.

Abstract: The present invention provides capacitive touch panel, and display device. The capacitive touch panel of the present invention comprises at least one column of electrode set, the electrode set comprising a plurality of electrode units sequentially arranged, and adjacent electrode units complementarily matching each other, wherein each electrode unit comprises first touch electrode, second touch electrode and third touch electrode, the first, second and third touch electrodes complementarily match each other, and the first touch electrode is used for keeping patterns of the second touch electrode and the third touch electrode included in the same electrode unit from contacting with each other, the second touch electrode is used for keeping pattern of the electrode unit from contacting with pattern of immediately previous electrode unit, and the third touch electrode is used for keeping the pattern of the electrode unit from contacting with pattern of immediately next electrode unit.

Abstract: A gate driving circuit and a display, the gate driving circuit comprises a plurality of shift register connected in cascade. The shift register comprises: a signal outputting circuit (32), a signal inputting circuit (31), an inverting circuit (33) and a logic circuit (33). The signal outputting circuit (32) receives a forward direction clock signal from an external circuit and comprises a clock transistor and a level transistor. The signal outputting circuit outputs the forward direction clock signal when the clock transistor is turned on and outputs a constant-low level signal when the level transistor is turned on. The signal inputting circuit (31) receives an output signal from a previous shift register, and turns on the clock transistor when the received output signal of the previous shift register is valid.