Patents by Inventor Tianpeng MIAO

Tianpeng MIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memristor-based processor integrating computing and memory and method for using the processor
    Patent number: 10020054
    Abstract: A processor including a computing and memory structure including X in number integration units and X in number communication units, and a control unit. The integration units are computing and memory units (CMUs), each computing and memory unit (CMU) is connected to a corresponding communication unit. The control unit is configured to produce control signals according to the commands, connect communication networks between the CMUs, choose operand addresses and result storage addresses, and search for one or a plurality of idle CMUs when extra CMUs are required for an operation. Each computing and memory unit includes M in number bit units and M?1 in number vertical line switches. Each bit unit includes a resistor, a horizontal line switch and N in number memristors. X is a positive integer greater than or equal to 2; M is a positive integer greater than or equal to 1.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: July 10, 2018
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Qun Liu, Tao Zhang, Xiangshui Miao, Yi Li, Yaxiong Zhou, Tianpeng Miao
  • MEMRISTOR-BASED PROCESSOR INTEGRATING COMPUTING AND MEMORY AND METHOD FOR USING THE PROCESSOR
    Publication number: 20170287558
    Abstract: A processor including a computing and memory structure including X in number integration units and X in number communication units, and a control unit. The integration units are computing and memory units (CMUs), each computing and memory unit (CMU) is connected to a corresponding communication unit. The control unit is configured to produce control signals according to the commands, connect communication networks between the CMUs, choose operand addresses and result storage addresses, and search for one or a plurality of idle CMUs when extra CMUs are required for an operation. Each computing and memory unit includes M in number bit units and M?1 in number vertical line switches. Each bit unit includes a resistor, a horizontal line switch and N in number memristors. X is a positive integer greater than or equal to 2; M is a positive integer greater than or equal to 1.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 5, 2017
    Inventors: Qun LIU, Tao ZHANG, Xiangshui MIAO, Yi LI, Yaxiong ZHOU, Tianpeng MIAO