Patents by Inventor Tianwei Sun

Tianwei Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798545
    Abstract: A speech interaction method includes: acquiring speech information of a user; determining a task list corresponding to the speech information, the task list comprising at least two ordered tasks; and for each task in the at least two ordered tasks, responsive to that a next task of a present task is a question-answer task, querying and sending response information of the next task to a user terminal before execution time of the next task arrives, such that the user terminal outputs the response information when the execution time of the next task arrives.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: October 24, 2023
    Assignee: Beijing Xiaomi Pinecone Electronics Co., Ltd.
    Inventors: Luyu Gao, Tianwei Sun, Baiming Ma
  • Patent number: 11616040
    Abstract: Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: March 28, 2023
    Assignee: NXP USA, Inc.
    Inventors: Tianwei Sun, Jaynal A. Molla
  • Patent number: 11417335
    Abstract: Aspects of the disclosure provide a method and device for information processing, a terminal, a server and a storage medium. The method can include that voice information is collected, and, responsive the voice information instructing a target application program to be started, instruction information configured to assist in starting the target application program is determined. The method can further include that multimedia information indicated by the instruction information is output according to the instruction information in a process of starting the target application program. Therefore, the multimedia information may be output in the process of starting the application program to improve the experience of a user in starting the application program.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 16, 2022
    Assignee: Beijing Xiaomi Pinecone Electronics Co., Ltd.
    Inventors: Baiming Ma, Tianwei Sun, Luyu Gao
  • Patent number: 11128268
    Abstract: Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: September 21, 2021
    Assignee: NXP USA, Inc.
    Inventors: Sharan Kishore, Jaynal A. Molla, Lakshminarayan Viswanathan, Tianwei Sun, David James Dougherty
  • Publication number: 20210210089
    Abstract: Aspects of the disclosure provide a method and device for information processing, a terminal, a server and a storage medium. The method can include that voice information is collected, and, responsive the voice information instructing a target application program to be started, instruction information configured to assist in starting the target application program is determined. The method can further include that multimedia information indicated by the instruction information is output according to the instruction information in a process of starting the target application program. Therefore, the multimedia information may be output in the process of starting the application program to improve the experience of a user in starting the application program.
    Type: Application
    Filed: July 31, 2020
    Publication date: July 8, 2021
    Applicant: Beijing Xiaomi Pinecone Electronics Co., Ltd.
    Inventors: Baiming Ma, Tianwei Sun, Luyu Gao
  • Publication number: 20210210088
    Abstract: A speech interaction method includes: acquiring speech information of a user; determining a task list corresponding to the speech information, the task list comprising at least two ordered tasks; and for each task in the at least two ordered tasks, responsive to that a next task of a present task is a question-answer task, querying and sending response information of the next task to a user terminal before execution time of the next task arrives, such that the user terminal outputs the response information when the execution time of the next task arrives.
    Type: Application
    Filed: July 17, 2020
    Publication date: July 8, 2021
    Inventors: Luyu GAO, Tianwei SUN, Baiming MA
  • Publication number: 20210167033
    Abstract: Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.
    Type: Application
    Filed: January 18, 2021
    Publication date: June 3, 2021
    Inventors: Tianwei Sun, Jaynal A. Molla
  • Patent number: 10923451
    Abstract: Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Tianwei Sun, Jaynal A. Molla
  • Publication number: 20210020595
    Abstract: Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.
    Type: Application
    Filed: July 16, 2019
    Publication date: January 21, 2021
    Inventors: Tianwei Sun, Jaynal A. Molla
  • Patent number: 9893156
    Abstract: A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: February 13, 2018
    Assignee: NXP USA, INC.
    Inventors: Jenn Hwa Huang, Tianwei Sun, James A. Teplik
  • Publication number: 20170200794
    Abstract: A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.
    Type: Application
    Filed: March 28, 2017
    Publication date: July 13, 2017
    Inventors: JENN HWA HUANG, TIANWEI SUN, JAMES A. TEPLIK
  • Patent number: 9647075
    Abstract: A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: May 9, 2017
    Assignee: NXP USA, INC.
    Inventors: Jenn Hwa Huang, Tianwei Sun, James A. Teplik
  • Publication number: 20170077245
    Abstract: A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 16, 2017
    Inventors: Jenn Hwa Huang, Tianwei Sun, James A. Teplik