Abstract: The invention provides a material surface treatment equipment, which is applied to a material substrate. The material surface treatment equipment includes a surface treatment device and at least one waveguide device. The surface treatment device is used to carry the material substrate to perform a surface treatment process. Each waveguide device is used for introducing electromagnetic waves to the material substrate to assist in performing the surface treatment process. Through the introduction of electromagnetic waves, the surface treatment process of the material substrate is easy to perform and can achieve the strengthening effect.

Abstract: An apparatus includes a six-axis correction stage, an auto-collimation measurement device, a light splitter, a telecentric image measurement device, and a controller. The six-axis correction stage carries a device under test; the auto-collimation measurement device is arranged above the six-axis correction stage along a measurement optical axis; the light splitter is arranged on the measurement optical axis and is interposed between the six-axis correction stage and the auto-collimation measurement device. A method controls the six-axis correction stage to correct rotation errors in at least two degrees of freedom of the device under test according to a measurement result of the auto-collimation measurement device, and controls the six-axis correction stage to correct translation and yaw errors in at least three degrees of freedom of the device under test according to a measurement result of the telecentric image measurement device by means of the controller.

Abstract: A monitoring method for a region includes capturing an image frame of a monitored region using an image capturing device, analyzing the image frame to obtain the image information of one or more target subject, receiving one or more wireless signal from one or more wireless transmitter by a wireless receiver, determining whether to generate a warning signal according to one or more identification (ID) code and the image information. The wireless signal includes the ID code, and for the cases of multiple wireless signals, each wireless signal has a different ID code.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes a black light filter layer and an opaque layer covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer where the light blocking portion is desired but not over the active section.

Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes a black light filter layer and an opaque layer covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer where the light blocking portion is desired but not over the active section.

Abstract: A method and device is disclosed for reducing noises in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes a black light filter layer and an opaque layer covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer where the light blocking portion is desired but not over the active section.

Abstract: Described are microlens designs to increase quantum efficiency and improve photonic performance of photosensitive integrated circuit device. A photosensitive integrated circuit made up of photodiodes, dielectric layers, metal contact holes, metal layers, and passivation stacks are formed on a semiconductor substrate. Microlenses are then formed over these encapsulating layers, the microlenses comprising non-planar surfaces, in particular a biconvex microlens formed above the photodiodes to direct, deliver, and focus incident light to the photodiodes for increased quantum efficiency and improved photonic performance. Color filters are then formed over the microlenses and the photodiodes so as to filter specific wavelengths of light.

Abstract: Described are microlens designs to increase quantum efficiency and improve photonic performance of photosensitive integrated circuit device. A photosensitive integrated circuit made up of photodiodes, dielectric layers, metal contact holes, metal layers, and passivation stacks are formed on a semiconductor substrate. Microlenses are then formed over these encapsulating layers, the microlenses comprising non-planar surfaces, in particular a biconvex microlens formed above the photodiodes to direct, deliver, and focus incident light to the photodiodes for increased quantum efficiency and improved photonic performance. Color filters are then formed over the microlenses and the photodiodes so as to filter specific wavelengths of light.

Abstract: A method and device is disclosed for reducing noises in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes a black light filter layer and an opaque layer covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer where the light blocking portion is desired but not over the active section.

Abstract: A critical dimension control wafer for calibrating process control scanning electron microscopes is described. The test wafer provides one or more test structures each consisting of an array of parallel trenches precision micro-machined in a metal plate. The trenches are formed, preferably in an aluminum/copper alloy plate, using focused ion beam milling. The micro-machined trenches have lower width roughness and lower edge roughness compared to similar patterns form in polysilicon by conventional photo lithographic methods. In addition, electron charging in the scanning electron microscope, which produces distorted images, is essentially eliminated. The dimensions of the trenches and the metal lines between them have dimensions comparable to those of polysilicon lines used in sub-tenth micron integrated circuit process technology control wafer. The control wafers are calibrated using a calibrated laboratory grade scanning electron microscope.

Abstract: A critical dimension control wafer for calibrating process control scanning electron microscopes is described. The test wafer provides one or more test structures each consisting of an array of parallel trenches precision micro-machined in a metal plate. The trenches are formed, preferably in an aluminum/copper alloy plate, using focused ion beam milling. The micro-machined trenches have lower width roughness and lower edge roughness compared to similar patterns form in polysilicon by conventional photo lithographic methods. In addition, electron charging in the scanning electron microscope, which produces distorted images, is essentially eliminated. The dimensions of the trenches and the metal lines between them have dimensions comparable to those of polysilicon lines used in sub-tenth micron integrated circuit process technology. control wafer. The control wafers are calibrated using a calibrated laboratory grade scanning electron microscope.

Abstract: A guard ring for protecting against electrostatic discharge (ESD) that has electrically isolated lightning bars has a substrate, a first ring, and a second ring. The first ring is on the substrate and has a number of electrically connected lightning bars. The second ring is also on the substrate and concentric to the first ring, but has a number of lightning bars that are electrically isolated from one another. The first ring may be the outer ring and the second ring may be the inner ring, or vice-versa. The guard ring has an ESD breakdown voltage that does not change, even after the first ring or the second ring has protected against ESD. The guard ring may protect a semiconductor component like a semiconductor photomask or a semiconductor device.

Abstract: A method of forming a planarized bond pad structure in a bond pad opening, while removing bond pad material from an opening in a non-device region used for scribe line formation, has been developed. A first iteration of this invention features the formation of the planarized bond bad structure in a bond pad opening defined in a dielectric layer, accomplished via deposition of a bond pad material followed by a chemical mechanical polishing (CMP), procedure, with the CMP procedure terminating at the top surface of the dielectric stop layer. The above procedures also result in unwanted bond pad material remaining in the scribe line opening. A photolithographic procedure defined to protect the planarized bond pad structure is used with a selective etching procedure removing unwanted bond pad material from the scribe line opening.

Abstract: A guard ring for protecting against electrostatic discharge (ESD) that has electrically isolated lightening bars is disclosed. The guard ring has a substrate, a first ring, and a second ring. The first ring is on the substrate and has a number of electrically connected lightening bars. The second ring is also on the substrate and concentric to the first ring, but has a number of lightening bars that are electrically isolated from one another. The first ring may be the outer ring and the second ring may be the inner ring, or vice-versa. The guard ring has an ESD breakdown voltage that does not change, even after the first ring or the second ring has protected against ESD. The guard ring may protect a semiconductor component like a semiconductor photomask or a semiconductor device.