Patents by Inventor Tilman Gloekler
Tilman Gloekler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10459031Abstract: The invention relates to an electronic circuit (10) having one or more latch scan chains (12), the electronic circuit (10) comprising (i) a built-in test structure (14); (ii) generation means (16) for simultaneously generating scan-in data for each of said scan chains (12); (iii) interception means (18) for simultaneously intercepting test lines (20) of said scan chains (12), said test lines (20) comprising scan-in lines (22) and/or control lines (24). Said interception means (18) are responsive to said generation means (16) in order to simultaneously feed the generated scan-in data into each of said scan chains (12) for initializing the electronic circuit (10). The invention further relates to a method for initializing an electronic circuit (10), as well as a data processing system (210) for initializing an electronic circuit (10).Type: GrantFiled: October 21, 2014Date of Patent: October 29, 2019Assignee: GLOBALFOUNDRIES INC.Inventors: Tilman Gloekler, Andreas Koenig, Jens Kuenzer, Cedric Lichtenau
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Patent number: 9541935Abstract: Systems and methods are provided to regulate a supply voltage of a load circuit. For example, a system includes a voltage regulator circuit that includes a passgate device. The system includes a passgate strength calibration control module which is configured to (i) obtain information which specifies operating conditions of the voltage regulator circuit, (ii) access entries of one or more look-up tables using the obtained information, (iii) use information within the accessed entries to determine a maximum load current that could be demanded by the load circuit under the operating conditions specified by the obtained information, and to predict a passgate device width which is sufficient to supply the determined maximum load current, and (iv) set an active width of the passgate device according to the predicted passgate device width.Type: GrantFiled: January 13, 2015Date of Patent: January 10, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: John F. Bulzacchelli, Zeynep Toprak Deniz, Joshua D. Friedrich, Tilman Gloekler, Gregory S. Still
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Patent number: 9465373Abstract: A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified.Type: GrantFiled: September 17, 2013Date of Patent: October 11, 2016Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Alan J. Drake, Michael S. Floyd, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani
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Patent number: 9459599Abstract: A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified.Type: GrantFiled: October 4, 2013Date of Patent: October 4, 2016Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Alan J. Drake, Michael S. Floyd, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani
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Publication number: 20160224396Abstract: Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.Type: ApplicationFiled: April 11, 2016Publication date: August 4, 2016Inventors: Bishop Brock, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani, Gregory S. Still, Malcolm S. Allen-Ware
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Patent number: 9378048Abstract: Embodiments include receiving, at a microcontroller of a chip, a request to execute a first task having a first priority. Embodiments further include determining that a second task having a second priority is currently executing. Embodiments further include determining that the first priority is higher than the second priority. Embodiments further include determining whether a value in a register indicates that the second task can be interrupted. If it is determined that the second task can be interrupted, embodiments further include triggering execution of the second task. If it is determined that the second task cannot be interrupted, embodiments further include waiting for lapse of a time period since receipt of the request to execute the first task, and interrupting the second task upon detecting lapse of the time period, or detecting, prior to the lapse of the time period, that the second task can be interrupted.Type: GrantFiled: June 11, 2014Date of Patent: June 28, 2016Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Andreas Koenig, Cedric Lichtenau, Preetham M. Lobo
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Patent number: 9372717Abstract: Embodiments include an apparatus comprising a processor and a computer readable storage medium having computer usable program code. The computer usable program code can be configured to determine whether priority of a requested task is higher than a priority of a currently executing task. The computer usable program code can be further configured to determine whether a value indicates that the currently executing task can be interrupted. The computer usable program code can be configured to trigger execution of the requested task on the processor, if the value indicates that the currently executed task can be interrupted. The computer usable program code can be further configured to wait for lapse of a time period and, interrupt the currently executing task upon detection of lapse of the time period or detection of a change to the value, if the value indicates that the currently executing task cannot be interrupted.Type: GrantFiled: May 8, 2014Date of Patent: June 21, 2016Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Andreas Koenig, Cedric Lichtenau, Preetham M Lobo
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Patent number: 9323300Abstract: An indication of a first performance state is received, the first performance state being associated with a first voltage. The first performance state applies to at least one computing system component and the indication is received by a computing system component distinct from the requesting computing system component. An indication of a second performance state is received. The second performance state is associated with a second voltage that is different from the first voltage. It is determined whether the second performance state is within a range defined by a minimum and maximum performance state. Responsive to a determination that the second performance state is within the minimum and maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state.Type: GrantFiled: November 27, 2012Date of Patent: April 26, 2016Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Charles R. Lefurgy, Karthick Rajamani, Guillermo J. Silva, Gregory S. Still, Malcolm S. Allen-Ware
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Patent number: 9323301Abstract: Computing system voltage control methods include receiving an indication of a first performance state. The first performance state is associated with a first voltage and applies to at least one computing system component. The indication of the first performance state is received by a first computing system component from a second computing system component. An indication of a second performance state is received, wherein the second performance state is associated with a second voltage that is not equal to the first voltage. It is determined whether the second performance state is within a range defined by a minimum performance state and a maximum performance state. Responsive to determining that the second performance state is within the range defined by the minimum performance state and the maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state.Type: GrantFiled: February 22, 2013Date of Patent: April 26, 2016Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Charles R. Lefurgy, Karthick Rajamani, Guillermo J. Silva, Gregory S. Still
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Patent number: 9311209Abstract: Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.Type: GrantFiled: November 27, 2012Date of Patent: April 12, 2016Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani, Gregory S. Still, Malcolm S. Allen-Ware
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Patent number: 9304886Abstract: Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory.Type: GrantFiled: February 21, 2013Date of Patent: April 5, 2016Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Bishop Brock, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani, Gregory S. Still
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Patent number: 9250668Abstract: A maximum and a minimum performance operating limit is set for a plurality of processing units in accordance with a set of one or more rules enforced by the performance supervisor. Each of the plurality of processing units has logic configured to ensure a request for an operational setting complies with the maximum and minimum operating limits. Each of the plurality of processing units is configured to output a request for a limit compliant operational setting to a performance controller. The performance controller is configured to actuate the operational request.Type: GrantFiled: November 29, 2012Date of Patent: February 2, 2016Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Karthick Rajamani, Guillermo J. Silva, Gregory S. Still, Malcolm S. Allen-Ware, Todd J. Rosedahl
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Patent number: 9218044Abstract: An apparatus includes memory, a processor coupled to the memory, and a set of one or more frequency target monitors. The processor includes a set of one or more processor cores, and the set of one or more frequency target monitors are coupled to the set of one or more processor cores. Each frequency target monitor is configured to determine a difference between an actual performance and an expected performance of a processor core from the set of one or more processor cores. Each frequency target monitor is also configured to, responsive to determining the difference between the actual performance and the expected performance of the processor core from the set of one or more processor cores, record an indication of a difference between the actual performance and the expected performance of the processor core from the set of one or more processor cores.Type: GrantFiled: November 27, 2012Date of Patent: December 22, 2015Assignee: International Business Machines CorporationInventors: Bishop Brock, Tilman Gloekler, Charles R. Lefurgy, Gregory S. Still
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Patent number: 9182797Abstract: Embodiments of the inventive subject matter include setting minimum and maximum performance operating limits for each of a plurality of controllers. The operating limits are set in accordance with performance rules imposed on the system. In response to a request to change operation of a processing unit to a requested operational setting, it is determined whether the requested operational setting complies with the minimum and maximum performance operating limits. The minimum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the minimum performance operating limit. The maximum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the maximum performance operating limit. The requested operational setting is sent to a performance controller if the requested operational setting complies with the minimum and maximum performance operating limits.Type: GrantFiled: February 8, 2013Date of Patent: November 10, 2015Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still
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Publication number: 20150123633Abstract: Systems and methods are provided to regulate a supply voltage of a load circuit. For example, a system includes a voltage regulator circuit that includes a passgate device. The system includes a passgate strength calibration control module which is configured to (i) obtain information which specifies operating conditions of the voltage regulator circuit, (ii) access entries of one or more look-up tables using the obtained information, (iii) use information within the accessed entries to determine a maximum load current that could be demanded by the load circuit under the operating conditions specified by the obtained information, and to predict a passgate device width which is sufficient to supply the determined maximum load current, and (iv) set an active width of the passgate device according to the predicted passgate device width.Type: ApplicationFiled: January 13, 2015Publication date: May 7, 2015Inventors: John F. Bulzacchelli, Zeynep Toprak Deniz, Joshua D. Friedrich, Tilman Gloekler, Gregory S. Still
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Publication number: 20150113346Abstract: The invention relates to an electronic circuit (10) having one or more latch scan chains (12), the electronic circuit (10) comprising (i) a built-in test structure (14); (ii) generation means (16) for simultaneously generating scan-in data for each of said scan chains (12); (iii) interception means (18) for simultaneously intercepting test lines (20) of said scan chains (12), said test lines (20) comprising scan-in lines (22) and/or control lines (24). Said interception means (18) are responsive to said generation means (16) in order to simultaneously feed the generated scan-in data into each of said scan chains (12) for initializing the electronic circuit (10). The invention further relates to a method for initializing an electronic circuit (10), as well as a data processing system (210) for initializing an electronic circuit (10).Type: ApplicationFiled: October 21, 2014Publication date: April 23, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: TILMAN GLOEKLER, ANDREAS KOENIG, JENS KUENZER, CEDRIC LICHTENAU
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Publication number: 20150081039Abstract: A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified.Type: ApplicationFiled: October 4, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Alan J. Drake, Michael S. Floyd, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani
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Publication number: 20150081044Abstract: A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Alan J. Drake, Michael S. Floyd, Tilman Gloekler, Charles R. Lefurgy, Karthick Rajamani
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Patent number: 8981829Abstract: Systems and methods are provided to regulate a supply voltage of a load circuit. For example, a system includes a voltage regulator circuit that includes a passgate device. The system includes a passgate strength calibration control module which is configured to (i) obtain information which specifies operating conditions of the voltage regulator circuit, (ii) access entries of one or more look-up tables using the obtained information, (iii) use information within the accessed entries to determine a maximum load current that could be demanded by the load circuit under the operating conditions specified by the obtained information, and to predict a passgate device width which is sufficient to supply the determined maximum load current, and (iv) set an active width of the passgate device according to the predicted passgate device width.Type: GrantFiled: August 13, 2014Date of Patent: March 17, 2015Assignee: International Business Machines CorporationInventors: John F. Bulzacchelli, Zeynep Toprak Deniz, Joshua D. Friedrich, Tilman Gloekler, Gregory S. Still
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Publication number: 20150061744Abstract: Systems and methods are provided to regulate a supply voltage of a load circuit. For example, a system includes a voltage regulator circuit that includes a passgate device. The system includes a passgate strength calibration control module which is configured to (i) obtain information which specifies operating conditions of the voltage regulator circuit, (ii) access entries of one or more look-up tables using the obtained information, (iii) use information within the accessed entries to determine a maximum load current that could be demanded by the load circuit under the operating conditions specified by the obtained information, and to predict a passgate device width which is sufficient to supply the determined maximum load current, and (iv) set an active width of the passgate device according to the predicted passgate device width.Type: ApplicationFiled: August 13, 2014Publication date: March 5, 2015Inventors: John F. Bulzacchelli, Zeynep Toprak Deniz, Joshua D. Friedrich, Tilman Gloekler, Gregory S. Still