Patents by Inventor Tim Pontius
Tim Pontius has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8259755Abstract: Methods and apparatus are provided for data communication between a transmitter and receiver over a plurality of serial links, which cause the transmitter to send serialized groups of bits down each lane, in such a way that the first bit of each group (each lane) is guaranteed to arrive in the correct order at the receiving end. Various embodiments of the present invention include declaring a budget for the maximum skew between lanes. In such embodiments, subsequent to determining the skew budget between lanes, the data to be transmitted is divided into groups of N bits, where N is any convenient number larger than M times S, with M being the number of lanes and S being the budgeted skew, in bit times.Type: GrantFiled: November 2, 2006Date of Patent: September 4, 2012Assignee: NXP B.V.Inventor: Tim Pontius
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Patent number: 8194790Abstract: A mobile device that incorporates the MIPI D-PHY specification has data lanes for carrying data between electronic modules within the device. The data lanes may incorporate a spaced-one-hot approach for asynchronously receiving a data signal over a two-wire interface. A two-wire receive interface is provided that uses an exclusive-NOR to capture a timing signal along with a set-reset flip-flop which holds the state of the data line so that a D flip-flop that is clocked on the falling edge of the timing signal received from the exclusive-NOR gate can sample the data and provide an accurate asynchronous data output.Type: GrantFiled: September 27, 2007Date of Patent: June 5, 2012Assignee: NXP B.V.Inventor: Tim Pontius
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Patent number: 8099614Abstract: The invention relates to a controlled shut-down of an electronic circuit or circuits such that the electrical power consumption of that circuit or circuits is minimized and that each said circuit is at a status which is a pre-determined state (42; 52) of that said circuit wherein all of its own control and messaging signals are taken to their zero level. The present invention claimed relates to the methodology of entering said circuit into this pre-determined state (42;52); where all said signal and messaging lines are taken to zero; thereby reducing power consumption within an electronic circuit when its status is defined as being shut-down or standby.Type: GrantFiled: September 11, 2006Date of Patent: January 17, 2012Assignee: NXP B.V.Inventors: Tim Pontius, Swati Saxena, Neal Wingen, Niranjan A. Puttaswamy
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Patent number: 8031746Abstract: There is provided a method of operating a communications system comprising a transmitting station and a receiving station, the method in the transmitting station comprising encoding a clock signal with data to form encoded signals for transmission; transmitting the encoded signals to the receiving station; the method in the receiving station comprising decoding the encoded signals to extract the clock signal and data; processing the data under the control of the decoded clock signal. The method further comprises, when no data is required to be transmitted to the receiving station, transmitting further encoded signals to the receiving station in order for the receiving station to decode the further encoded signals and extract a clock signal.Type: GrantFiled: November 22, 2006Date of Patent: October 4, 2011Assignee: ST-Ericsson SAInventors: Gerrit Willem Den Besten, Tim Pontius
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Publication number: 20100061428Abstract: A mobile device that incorporates the MIPI D-PHY specification has data lanes for carrying data between electronic modules within the device. The data lanes may incorporate a spaced-one-hot approach for asynchronously receiving a data signal over a two-wire interface. A two-wire receive interface is provided that uses an exclusive-NOR to capture a timing signal along with a set-reset flip-flop which holds the state of the data line so that a D flip-flop that is clocked on the falling edge of the timing signal received from the exclusive-NOR gate can sample the data and provide an accurate asynchronous data output.Type: ApplicationFiled: September 27, 2007Publication date: March 11, 2010Applicant: NXP, B.V.Inventor: Tim Pontius
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Publication number: 20080279224Abstract: Methods and apparatus are provided for data communication between a transmitter and receiver over a plurality of serial links, which cause the transmitter to send serialized groups of bits down each lane, in such a way that the first bit of each group (each lane) is guaranteed to arrive in the correct order at the receiving end. Various embodiments of the present invention include declaring a budget for the maximum skew between lanes. In such embodiments, subsequent to determining the skew budget between lanes, the data to be transmitted is divided into groups of N bits, where N is any convenient number larger than M times S, with M being the number of lanes and S being the budgeted skew, in bit times.Type: ApplicationFiled: November 2, 2006Publication date: November 13, 2008Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventor: Tim Pontius
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Publication number: 20080279225Abstract: There is provided a method of operating a communications system comprising a transmitting station and a receiving station, the method in the transmitting station comprising encoding a clock signal with data to form encoded signals for transmission; transmitting the encoded signals to the receiving station; the method in the receiving station comprising decoding the encoded signals to extract the clock signal and data; processing the data under the control of the decoded clock signal. The method further comprises, when no data is required to be transmitted to the receiving station, transmitting further encoded signals to the receiving station in order for the receiving station to decode the further encoded signals and extract a clock signal.Type: ApplicationFiled: November 22, 2006Publication date: November 13, 2008Applicant: NXP B.V.Inventors: Gerrit Willem Den Besten, Tim Pontius
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Publication number: 20080256377Abstract: The invention relates to a controlled shut-down of an electronic circuit or circuits such that the electrical power consumption of that circuit or circuits is minimized and that each said circuit is at a status which is a pre-determined state (42; 52) of that said circuit wherein all of its own control and messaging signals are taken to their zero level. The present invention claimed relates to the methodology of entering said circuit into this pre-determined state (42;52); where all said signal and messaging lines are taken to zero; thereby reducing power consumption within an electronic circuit when its status is defined as being shut-down or standby.Type: ApplicationFiled: September 11, 2006Publication date: October 16, 2008Applicant: NXP B.V.Inventors: Tim Pontius, Swati Saxena, Neal Wingen, Niranjan Ap