Patents by Inventor Timothy J. Schimke

Timothy J. Schimke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9996382
    Abstract: A method, system and computer program product are provided for implementing dynamic cost calculation for a Single Root Input/Output Virtualization (SRIOV) virtual function (VF) in cloud environments. A management function periodically queries the SRIOV adapter for activity statistics for each assigned virtual function. The management function builds a usage heuristic based on the resource usage statistics. The management function calculates dynamic cost for the SRIOV VF based on the resource usage statistics. Calculated dynamic costs for the SRIOV VF are provided to a virtual function user and users are enabled to scale their VF resources. The VF resources are selectively scaled-up and scaled-down responsive to user input based upon VF resource usage.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 12, 2018
    Assignee: International Business Machines Corporation
    Inventors: Manu Anand, Charles S. Graham, Timothy J. Schimke
  • Publication number: 20180113644
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Application
    Filed: November 8, 2017
    Publication date: April 26, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20180113823
    Abstract: Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Application
    Filed: November 9, 2017
    Publication date: April 26, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Patent number: 9916267
    Abstract: Migrating interrupts from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, interrupt mapping information, were the source hypervisor supports operation of a logical partition executing on the source computing system and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the destination hypervisor of the destination computing system, the destination computing system with the interrupt mapping information collected by the source hypervisor; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: March 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9892070
    Abstract: Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9875060
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20180004565
    Abstract: A method, system and computer program product are provided for implementing coherent accelerator function isolation for virtualization in an input/output (IO) adapter in a computer system. A coherent accelerator provides accelerator function units (AFUs), each AFU is adapted to operate independently of the other AFUs to perform a computing task that can be implemented within application software on a processor. The AFU has access to system memory bound to the application software and is adapted to make copies of that memory within AFU memory-cache in the AFU. As part of this memory coherency domain, each of the AFU memory-cache and processor memory-cache is adapted to be aware of changes to data commonly in either cache as well as data changed in memory of which the respective cache contains a copy.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 4, 2018
    Inventors: Jesse P. Arroyo, Srinivas Kotta, Gregory M. Nordstrom, Timothy J. Schimke
  • Publication number: 20180004566
    Abstract: A method, system and computer program product are provided for implementing coherent accelerator function isolation for virtualization in an input/output (IO) adapter in a computer system. A coherent accelerator provides accelerator function units (AFUs), each AFU is adapted to operate independently of the other AFUs to perform a computing task that can be implemented within application software on a processor. The AFU has access to system memory bound to the application software and is adapted to make copies of that memory within AFU memory-cache in the AFU. As part of this memory coherency domain, each of the AFU memory-cache and processor memory-cache is adapted to be aware of changes to data commonly in either cache as well as data changed in memory of which the respective cache contains a copy.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 4, 2018
    Inventors: Jesse P. Arroyo, Srinivas Kotta, Gregory M. Nordstrom, Timothy J. Schimke
  • Publication number: 20170344391
    Abstract: Systems, methods, and computer program products to perform an operation comprising executing a device driver in a private logical partition on a compute host, wherein the device driver is configured to execute in an environment different than an environment of a hypervisor of the compute host, establishing a communication channel between the private logical partition and an adjunct partition executing on the compute host, and configuring, responsive to a command sent by the adjunct partition to the device driver via the communication channel, a physical function of a single root I/O virtualization (SR-IOV) device of the host system.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Inventors: Juan J. Alvarez, Jesse P. Arroyo, Paul G. Crumley, Charles S. Graham, Joefon Jann, Timothy J. Schimke, Ching-Farn E. Wu
  • Patent number: 9830171
    Abstract: Migrating MMIO from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, MMIO mapping information, wherein the hypervisor supports operation of a logical partition executing and the logical partition is configured for MMIO operations with the source I/O adapter through a MMU of the computing system utilizing the MMIO mapping information; placing, by the hypervisor, the destination I/O adapter in an error state; configuring, by the hypervisor, the MMU for MMIO with the logical partition utilizing the MMIO mapping information collected by the hypervisor; and enabling the destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: November 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9785451
    Abstract: Migrating MMIO from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, MMIO mapping information, wherein the hypervisor supports operation of a logical partition executing and the logical partition is configured for MMIO operations with the source I/O adapter through a MMU of the computing system utilizing the MMIO mapping information; placing, by the hypervisor, the destination I/O adapter in an error state; configuring, by the hypervisor, the MMU for MMIO with the logical partition utilizing the MMIO mapping information collected by the hypervisor; and enabling the destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20170286145
    Abstract: A method, system and computer program product are provided for implementing dynamic cost calculation for a Single Root Input/Output Virtualization (SRIOV) virtual function (VF) in cloud environments. A management function periodically queries the SRIOV adapter for activity statistics for each assigned virtual function. The management function builds a usage heuristic based on the resource usage statistics. The management function calculates dynamic cost for the SRIOV VF based on the resource usage statistics. Calculated dynamic costs for the SRIOV VF are provided to a virtual function user and users are enabled to scale their VF resources. The VF resources are selectively scaled-up and scaled-down responsive to user input based upon VF resource usage.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Inventors: Manu Anand, Charles S. Graham, Timothy J. Schimke
  • Patent number: 9778989
    Abstract: A method, system and computer program product are provided for implementing concurrent adapter firmware update of a Single Root Input/Output Virtualization (SRIOV) adapter in a virtualized system. An adapter driver is used to update adapter firmware concurrent with normal I/O operations. When configuration is stored in a scratchpad buffer, the adapter driver detects virtual functions (VFs) configured and operating. An enhanced error handling (EEH) process is initiated, freezing the VFs, and an updated adapter firmware image is loaded to the adapter. The adapter driver completes the EEH recovery, the adapter is restarted using the new updated adapter firmware. The VFs device drivers unfreeze the VFs, and complete the EEH recovery.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: October 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, James A. Donnelly, Charles S. Graham, John R. Oberly, III, Timothy J. Schimke
  • Patent number: 9766916
    Abstract: A method, system and computer program product are provided for implementing coherent accelerator function isolation for virtualization in an input/output (IO) adapter in a computer system. A coherent accelerator provides accelerator function units (AFUs), each AFU is adapted to operate independently of the other AFUs to perform a computing task that can be implemented within application software on a processor. The AFU has access to system memory bound to the application software and is adapted to make copies of that memory within AFU memory-cache in the AFU. As part of this memory coherency domain, each of the AFU memory-cache and processor memory-cache is adapted to be aware of changes to data commonly in either cache as well as data changed in memory of which the respective cache contains a copy.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: September 19, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Srinivas Kotta, Gregory M. Nordstrom, Timothy J. Schimke
  • Patent number: 9760512
    Abstract: A method of migrating DMA mappings from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, including: collecting, by a source hypervisor of the source computing system, DMA mapping information, wherein the source hypervisor supports operation of a logical partition executing on the source computing system and the logical partition is configured for DMA operations with the source I/O adapter utilizing the DMA mapping information; configuring, by a destination hypervisor of the destination computing system, the destination I/O adapter with DMA mappings based on the DMA mapping information collected by the source hypervisor; placing, by the destination hypervisor, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20170249136
    Abstract: Firmware management of SR-IOV adapters in a computing system includes: receiving, by a hypervisor, a request to update a hypervisor-hosted firmware image including replacing a firmware image previously stored in a reserved memory space of the hypervisor with a replacement firmware image, where the hypervisor-hosted firmware image includes an SR-IOV adapter firmware image configured for installation on SR-IOV adapters of a particular type; determining whether all SR-IOV adapters of the particular type in the computing system have been updated to the previously stored firmware image; and updating the hypervisor-hosted firmware image only if all SR-IOV adapters of the particular type in the computing system have been updated to the previously stored firmware image, including replacing, in the reserved memory space, the previously stored firmware image with the replacement firmware image.
    Type: Application
    Filed: February 29, 2016
    Publication date: August 31, 2017
    Inventors: MANU ANAND, JESSE P. ARROYO, CHARLES S. GRAHAM, TIMOTHY J. SCHIMKE
  • Publication number: 20170242763
    Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
    Type: Application
    Filed: February 23, 2016
    Publication date: August 24, 2017
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20170242756
    Abstract: Live partition mobility in a computing environment that includes a source system and a target system may be carried out by: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.
    Type: Application
    Filed: February 22, 2016
    Publication date: August 24, 2017
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20170242720
    Abstract: A computing environment includes a computing system, where the computing system includes a plurality of logical partitions, a hypervisor supporting the plurality of logical partitions, a plurality of SR-IOV adapters, where at least one of the logical partitions is mapped to a virtual function on a first SR-IOV adapter of the plurality of adapters, and where migrating an SR-IOV adapter configuration in the computing environment includes: cloning, on a second SR-IOV adapter, a configuration of the first SR-IOV adapter; placing the second SR-IOV adapter and the virtual function in an error state; remapping the virtual function from the first SR-IOV adapter to the second SR-IOV adapter; and placing the second SR-IOV adapter and the virtual function in an error recovery state.
    Type: Application
    Filed: February 23, 2016
    Publication date: August 24, 2017
    Inventors: MANU ANAND, JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Patent number: 9740647
    Abstract: Migrating DMA mappings from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, DMA mapping information, where the hypervisor supports operation of a logical partition executing on the computing system and the logical partition is configured for DMA operations with the source I/O adapter utilizing the DMA mapping information; configuring, by the hypervisor, the destination I/O adapter with DMA mappings based on the DMA mapping information collected by the hypervisor; placing, by the hypervisor, the source and destination I/O adapter in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke