Abstract: While performing a tomosynthesis procedure, the breast of a patient is compressed between two compression elements to create an imaging condition. Foam is secured to the rigid substrate of a one of the compression elements. The patient's chest wall is aligned with the leading edge surface of the foam. The inner side of the breast is disposed proximate the lateral edge surface of the foam and the outer side of the breast is disposed proximate the outer lateral edge surface of the foam. A mid-plane is disposed between the inner and outer lateral edge surfaces of the foam. An interface connects a leading edge surface of the foam and compressive surfaces. A portion of the leading edge surface which is aligned with the mid-plane is incompletely compressed.

Abstract: The apparatus and method for high speed data and command transfer over an interface (202), such as an ISA or PCMCIA bus or interface, includes a transceiver (206) and a processor (210) having a direct memory access (DMA) controller (240), a memory (211) for storage of data, and a channel interface (218) for connection to a communications channel. The processor (210) is responsive through a set of program instructions, such as software or firmware, to receive an interrupt signal (310, 315) and, when the interrupt signal indicates a write command (320, 330), to transfer data via the transceiver from the interface to the memory for transmission over the communications channel (335), and when the interrupt signal indicates data received from the communications channel (350), the processor further responsive to generate a read command and transfer data from the memory to the interface via the transceiver (355).

Abstract: The apparatus and method for high speed data and command transfer over an interface (202), such as an ISA or PCMCIA bus or interface, includes a transceiver (206) and a processor (210) having a direct memory access (DMA) controller (240), a memory (211) for storage of data, and a channel interface (218) for connection to a communications channel. The processor (210) is responsive through a set of program instructions, such as software or firmware, to receive an interrupt signal (310, 315) and, when the interrupt signal indicates a write command (320, 330), to transfer data via the transceiver from the interface to the memory for transmission over the communications channel (335), and when the interrupt signal indicates data received from the communications channel (350), the processor further responsive to generate a read command and transfer data from the memory to the interface via the transceiver (355).

Abstract: The apparatus (101) and method provide for data transmission capability on bonded data channels of a communications network (104), such as an integrated services digital network, utilizing a single serial communication controller ("SCC") for the bonded data channels. The apparatus (101) includes an interface transceiver (210), interface circuitry (220), and an integrated multiprotocol processor (200). The integrated multiprotocol processor (200) contains an SCC (420) which may be utilized for data transmission on bonded data channels, with other SCCs (430, 440) available for use on other channels. The apparatus and method provide for proper data alignment of primary (or master) channel data and secondary channel data on the bonded channels, through the same SCC, through utilization of a predetermined information pattern transmitted in a loopback mode (810, 820) of the interface transceiver (210), to the receiver of the SCC (830).