Patents by Inventor Timothy Mullins

Timothy Mullins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070083740
    Abstract: A method, apparatus and computer program product are provided for implementing polymorphic branch history table (BHT) reconfiguration. A BHT includes a plurality of predetermined configurations corresponding predetermined operational modes. A first BHT configuration is provided. Checking is provided to identify improved performance with another BHT configuration. The BHT is reconfigured to provide improved performance based upon the current workload.
    Type: Application
    Filed: October 7, 2005
    Publication date: April 12, 2007
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey Bradford, Richard Eickemeyer, Timothy Heil, Harold Kossman, Timothy Mullins
  • Publication number: 20070083712
    Abstract: A method, apparatus and computer program product are provided for implementing polymorphic reconfiguration of a cache size. A cache includes a plurality of physical sub-banks. A first cache configuration is provided. Then checking is provided to identify improved performance with another cache configuration. The cache size is reconfigured to provide improved performance based upon the current workload.
    Type: Application
    Filed: October 7, 2005
    Publication date: April 12, 2007
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey Bradford, Todd Christensen, Richard Eickemeyer, Timothy Heil, Harold Kossman, Timothy Mullins
  • Publication number: 20070083711
    Abstract: In a method of using a cache in a computer, the computer is monitored to detect an event that indicates that the cache is to be reconfigured into a metadata state. When the event is detected, the cache is reconfigured so that a predetermined portion of the cache stores metadata. A computational circuit employed in association with a computer includes a cache, a cache event detector circuit, and a cache reconfiguration circuit. The cache event detector circuit detects an event relative to the cache. The cache reconfiguration circuit reconfigures the cache so that a predetermined portion of the cache stores metadata when the cache event detector circuit detects the event.
    Type: Application
    Filed: October 7, 2005
    Publication date: April 12, 2007
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey Bradford, Richard Eickemeyer, Timothy Heil, Harold Kossman, Timothy Mullins
  • Publication number: 20050138628
    Abstract: An apparatus, program product and method initiate, in connection with a context switch operation, a prefetch of at least one instruction likely to be executed by a thread prior to resuming execution of that thread. As a result, once it is known that a context switch will be performed to a particular thread, one or more instructions may be prefetched on behalf of that thread so that when execution of the thread is resumed, those instructions are more likely to be cached, or at least in the process of being retrieved into cache memory, thus enabling a thread to begin executing instructions more quickly than if the thread was required to fetch those instructions upon resumption of its execution.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey Bradford, Harold Kossman, Timothy Mullins
  • Publication number: 20050138627
    Abstract: An apparatus, program product and method initiate, in connection with a context switch operation, a prefetch of data likely to be used by a thread prior to resuming execution of that thread. As a result, once it is known that a context switch will be performed to a particular thread, data may be prefetched on behalf of that thread so that when execution of the thread is resumed, more of the working state for the thread is likely to be cached, or at least in the process of being retrieved into cache memory, thus reducing cache-related performance penalties associated with context switching.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey Bradford, Harold Kossman, Timothy Mullins