Patents by Inventor Timothy V. Statz

Timothy V. Statz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5977574
    Abstract: An arrangement and method for making a gate array architecture locates the well taps at the outer corners of each gate cell. The power buses are also located at the outside of the gate cell as well, enabling sharing of the well taps and the power buses. The location of the well taps at the outside corners of the standard cell reduces the number of transistors in a single repeatable cell from eight transistors to four transistors.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: November 2, 1999
    Assignee: LSI Logic Corporation
    Inventors: Jonathan Schmitt, Timothy V. Statz
  • Patent number: 5966030
    Abstract: An output driver circuit includes first and second supply terminals, first and second complementary data terminals and an output terminal. A pull-up transistor is coupled between the first supply terminal and the output terminal and has a first control terminal. A pull-down transistor is coupled between the second supply terminal and the output terminal and has a second control terminal which is coupled to the second data terminal. A voltage level shifting circuit is coupled between the first complementary data terminal and the first control terminal and is biased between the first supply terminal and a voltage-controlled node. A voltage regulator is coupled to the voltage-controlled node for regulating the node at a selected voltage.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: October 12, 1999
    Assignee: LSI Logic Corporation
    Inventors: Jonathan Schmitt, Timothy V. Statz
  • Patent number: 5825601
    Abstract: An electrostatic discharge (ESD) protection circuit includes first and second supply terminals, a current source, a shunt transistor, an inverter and a voltage level shifting device. The shunt transistor is coupled between the first and second supply terminals and has a control terminal. The inverter includes an input coupled to the current source, an output coupled to the control terminal of the shunt transistor and pull-up and pull-down transistors coupled between the first and second supply terminals. The pull-up and pull-down transistors have control terminals which are coupled to the input. The voltage level shifting device is coupled between the input and the control terminal of one of the pull-up and pull-down transistors.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: October 20, 1998
    Assignee: LSI Logic Corporation
    Inventors: Timothy V. Statz, Dongwook Drew Suh, Kevin Spielberger
  • Patent number: 5745587
    Abstract: An electroacoustic device such as a hearing aid having a battery, microphone, speaker, a preamplifier, a voltage regulator and power amplifier. The power amplifier includes identically configured output and bridge stages connected to opposite sides of the speaker, the output signals from the output stage being connected through a blocking capacitor to the input of the bridge stage. The output/bridge stage circuit includes an interface stage and two current gain stages. The interface stage converts voltage signals to current signals with a pair of outputs respectively connected to the two like-configured current gain stages. Each current gain stage includes two successive sections, each having a pair of transistors, one of which is configured as a diode connected in series with a resistor to shunt current from the base of the other transistor.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 28, 1998
    Assignee: Bausch & Lomb Incorporated
    Inventors: Timothy V. Statz, Thomas A. Scheller
  • Patent number: 4937473
    Abstract: A data storage latch which permits forming a feedback loop for storage and permits storing data signals in an open loop configuration using logic circuit elements based on cross-coupled transistor loads.
    Type: Grant
    Filed: October 4, 1988
    Date of Patent: June 26, 1990
    Assignee: Honeywell, Inc.
    Inventors: Timothy V. Statz, Robert L. Rabe, Michael R. Hegre