Patents by Inventor Timothy Von Werne

Timothy Von Werne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9985207
    Abstract: A method of producing an electronic device including the steps of: (i) providing a body including a first, conductive element separated from a first surface of said body by a portion of said body; (ii) removing a selected portion of said body to define a recess in said body extending from said first surface and via which a portion of said first element is exposed; and (iii) putting into said recess a liquid medium carrying a first material; wherein said first material is preferentially deposited on the exposed inner surface of said body defining said recess, and wherein the deposited first material is used to provide a connection between said first element and a second conductive element located within said body or later deposited over said first surface of said body.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: May 29, 2018
    Assignee: FLEXENABLE LIMITED
    Inventors: Carl Hayton, Henning Sirringhaus, Timothy Von Werne, Shane Norval
  • Patent number: 8896071
    Abstract: A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: November 25, 2014
    Assignee: Plastic Logic Limited
    Inventors: Timothy Von Werne, Catherine Mary Ramsdale, Henning Sirringhaus
  • Publication number: 20130240256
    Abstract: A method for reducing creep corrosion on a printed circuit board, the printed circuit board comprising a substrate, a plurality of electrically conductive tracks located on at least one surface of the substrate, a solder mask coating at least a first area of the plurality of electrically conductive tracks and a surface finish coating at least a second area of the plurality of electrically conductive tracks, the method comprising depositing by plasma-polymerization a fluorohydrocarbon onto at least part of the solder mask and at least part of the surface finish.
    Type: Application
    Filed: November 9, 2011
    Publication date: September 19, 2013
    Inventor: Timothy Von Werne
  • Publication number: 20100155708
    Abstract: A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.
    Type: Application
    Filed: May 12, 2008
    Publication date: June 24, 2010
    Applicant: PLASTIC LOGIC LIMITED
    Inventors: Timothy Von Werne, Catherine Mary Ramsdale, Henning Sirringhaus
  • Publication number: 20090232969
    Abstract: A method of producing an electronic device including the steps of: (i) providing a body including a first, conductive element separated from a first surface of said body by a portion of said body; (ii) removing a selected portion of said body to define a recess in said body extending from said first surface and via which a portion of said first element is exposed; and (iii) putting into said recess a liquid medium carrying a first material; wherein said first material is preferentially deposited on the exposed inner surface of said body defining said recess, and wherein the deposited first material is used to provide a connection between said first element and a second conductive element located within said body or later deposited over said first surface of said body.
    Type: Application
    Filed: December 6, 2005
    Publication date: September 17, 2009
    Applicant: Plastic Logic Limited
    Inventors: Carl Hayton, Henning Sirringhaus, Timothy Von Werne, Shane Norval
  • Publication number: 20070232035
    Abstract: A technique for high-resolution surface energy assisted patterning of semiconductor active layer islands on top of an array of predefined source-drain electrodes without requiring an additional process step for surface energy patterning.
    Type: Application
    Filed: May 16, 2005
    Publication date: October 4, 2007
    Inventors: Catherine Ramsdale, Henning Sirringhaus, Timothy Von Werne