Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design, for allocating processing functions between a primary processor and a secondary processor is disclosed. A primary processor is provided that performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Abstract: Systems, methods and media for allocating processing functions between a primary processor and a secondary processor are disclosed. In one embodiment, a primary processor performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design, for allocating processing functions between a primary processor and a secondary processor is disclosed. A primary processor is provided that performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Abstract: Systems, methods and media for allocating processing functions between a primary processor and a secondary processor are disclosed. In one embodiment, a primary processor performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Abstract: A line protection circuit for an ISDN device includes a pair of identical, NMOS field effect transistors connected between the device and opposite terminals of one winding of an isolation transformer. Each device has one N region connected to an output line from the ISDN device, a second N region connected to one winding terminal, a grounded channel or P region and a gate connected to a source of positive logic voltage. During normal operation, the FETs pass current provided by a constant current source within the ISDN device without attenuation. If a power surge occurs elsewhere in the ISDN network, the voltage at one of the FETs is be clamped to ground while the voltage at the other FET rises only until FET cut-off occurs. If power is removed from the FETs, at least one PN junction will always be reverse biased to isolate the protected ISDN device from the remainder of the network.

Abstract: In an ISDN communications system, a remote station power detector circuit comprises a capacitor connected between center taps of transformers on the receive and transmit pairs of conductors. The capacitor stores energy delivered from a central DC power source. Two serially-connected opto-couplers form a discharge path for the capacitor. The first opto-coupler is periodically driven on to partially complete the discharge path. If the capacitor charge exceeds a predetermined minimum, the second opto-coupler will then be driven on, providing a logic level output usable by the remote station. Power consumption is minimized by the use of large resistors in series with the capacitor while reliable power detection is achieved by detecting accumulated charge on the capacitor. Dielectric isolation is provided through the use of opto-coupler circuits.