Patents by Inventor Ting-Cheng Tseng
Ting-Cheng Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9524361Abstract: A method for decomposing a layout of an integrated circuit is provided. First, a layout of the integrated circuit is imported, wherein the layout comprises a plurality of sub patterns in a cell region, and a first direction and a second direction are defined thereon. Next, one sub pattern positioned at a corner of the cell region is assigned to an anchor pattern. Then, the sub patterns in the row same as the anchor pattern along the second direction is assigned to the first group. Finally, the rest of the sub patterns are decomposed into the first group and the second group according to a design rule, wherein the sub patterns in the same line are decomposed into the first group and the second group alternatively.Type: GrantFiled: April 20, 2015Date of Patent: December 20, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ting-Cheng Tseng, Ming-Jui Chen, Chia-Wei Huang
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Publication number: 20160306910Abstract: A method for decomposing a layout of an integrated circuit is provided. First, a layout of the integrated circuit is imported, wherein the layout comprises a plurality of sub patterns in a cell region, and a first direction and a second direction are defined thereon. Next, one sub pattern positioned at a corner of the cell region is assigned to an anchor pattern. Then, the sub patterns in the row same as the anchor pattern along the second direction is assigned to the first group. Finally, the rest of the sub patterns are decomposed into the first group and the second group according to a design rule, wherein the sub patterns in the same line are decomposed into the first group and the second group alternatively.Type: ApplicationFiled: April 20, 2015Publication date: October 20, 2016Inventors: Ting-Cheng Tseng, Ming-Jui Chen, Chia-Wei Huang
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Patent number: 9368365Abstract: A manufacturing method for forming a semiconductor structure includes: first, a plurality of fin structures are formed on a substrate and arranged along a first direction, next, a first fin cut process is performed, so as to remove parts of the fin structures which are disposed within at least one first fin cut region, and a second fin cut process is then performed, so as to remove parts of the fin structures which are disposed within at least one second fin cut region, where the second fin cut region is disposed along at least one edge of the first fin cut region.Type: GrantFiled: May 12, 2015Date of Patent: June 14, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shih-Hsun Kuo, Ting-Cheng Tseng, Tan-Ya Yin, Chia-Wei Huang, Ming-Jui Chen
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Patent number: 9104833Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.Type: GrantFiled: May 26, 2014Date of Patent: August 11, 2015Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
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Publication number: 20140258946Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.Type: ApplicationFiled: May 26, 2014Publication date: September 11, 2014Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
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Publication number: 20140256132Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.Type: ApplicationFiled: March 7, 2013Publication date: September 11, 2014Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Ping-I Hsieh
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Patent number: 8822328Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.Type: GrantFiled: March 7, 2013Date of Patent: September 2, 2014Assignee: United Microelectronics Corp.Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Ping-I Hsieh
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Patent number: 8778604Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.Type: GrantFiled: April 24, 2012Date of Patent: July 15, 2014Assignee: United Microelectronics Corp.Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
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Patent number: 8741507Abstract: A method for separating photomask pattern, including the following steps: first, a layout pattern is provided, wherein the layout pattern is defined to have at least one critical pattern and at least one non-critical pattern. Then, a first split process is performed to separate the critical pattern into a plurality of first patterns and a plurality of second patterns. A second split process is performed to separate the non-critical pattern into a plurality of third patterns and a plurality of fourth patterns. Finally, the first patterns and the third patterns are output to a first photomask, and the second patterns and the fourth patterns are output to a second photomask.Type: GrantFiled: January 16, 2013Date of Patent: June 3, 2014Assignee: United Microelectronics Corp.Inventors: Chun-Hsien Huang, Ming-Jui Chen, Chia-Wei Huang, Ting-Cheng Tseng
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Patent number: 8608504Abstract: A connector and a connector assembly are provided by the invention. The connector includes a main body formed by a printed circuit board and a plurality of cables. The printed circuit board has a surface conductive trace layer, an inner insulation layer, a ground layer and a surface insulation layer. The surface conductive trace layer has a conductive trace pattern comprising a plurality of contacting-end pattern portions and a plurality of bonding pad portions. The inner insulation layer is located on the surface conductive trace layer. The ground layer is located on the inner insulation layer. The surface insulation layer overlays the ground layer and exposes out a part of the ground layer. The cables are electrically connected to the bonding pad portions of the conductive trace patterns.Type: GrantFiled: September 25, 2011Date of Patent: December 17, 2013Assignee: Bing Xu Precision Co., Ltd.Inventor: Ting-Cheng Tseng
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Publication number: 20130280645Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.Type: ApplicationFiled: April 24, 2012Publication date: October 24, 2013Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
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Patent number: 8470655Abstract: A method for designing a stressor pattern is described, wherein the stressor pattern is used to form S/D regions of a second-type MOS transistor. A first distance between a boundary of the stressor pattern and a first active area of a first-type MOS transistor is derived. If the first distance is less than a safe distance, the stressor pattern is shrunk to make the first distance at least equal to the safe distance.Type: GrantFiled: April 18, 2012Date of Patent: June 25, 2013Assignee: United Microelectronics Corp.Inventors: Chun-Hsien Huang, Ming-Jui Chen, Chia-Wei Huang, Ting-Cheng Tseng
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Patent number: 8423923Abstract: An optical proximity correction method is provided. A target pattern is provided, and then the target pattern is decomposed to a first pattern and a second pattern. The first pattern and the second pattern are alternately arranged in a dense region. Then, a compensation pattern is provided and it is determined whether the compensation pattern is added into the first pattern to become a first revised pattern, or into the second pattern to become a second revised pattern. Finally, the first revised pattern is output onto a first mask and the second revised pattern is output onto a second mask.Type: GrantFiled: July 20, 2011Date of Patent: April 16, 2013Assignee: United Microelectronics Corp.Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Hui-Fang Kuo
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Publication number: 20130024824Abstract: An optical proximity correction method is provided. A target pattern is provided, and then the target pattern is decomposed to a first pattern and a second pattern. The first pattern and the second pattern are alternately arranged in a dense region. Then, a compensation pattern is provided and it is determined whether the compensation pattern is added into the first pattern to become a first revised pattern, or into the second pattern to become a second revised pattern. Finally, the first revised pattern is output onto a first mask and the second revised pattern is output onto a second mask.Type: ApplicationFiled: July 20, 2011Publication date: January 24, 2013Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Hui-Fang Kuo
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Publication number: 20120190217Abstract: A connector and a connector assembly are provided by the invention. The connector includes a main body formed by a printed circuit board and a plurality of cables. The printed circuit board has a surface conductive trace layer, an inner insulation layer, a ground layer and a surface insulation layer. The surface conductive trace layer has a conductive trace pattern comprising a plurality of contacting-end pattern portions and a plurality of bonding pad portions. The inner insulation layer is located on the surface conductive trace layer. The ground layer is located on the inner insulation layer. The surface insulation layer overlays the ground layer and exposes out a part of the ground layer. The cables are electrically connected to the bonding pad portions of the conductive trace patterns.Type: ApplicationFiled: September 25, 2011Publication date: July 26, 2012Applicant: BING XU PRECISION CO. LTD.Inventor: Ting-Cheng Tseng