Patents by Inventor Ting Chu

Ting Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162119
    Abstract: An embodiment is a method including forming a first interconnect structure over a first substrate, the first interconnect structure including dielectric layers and metallization patterns therein, the metallization patterns including a top metal layer including top metal structures, forming a passivation layer over the top metal structures of the first interconnect structure, forming a first opening through the passivation layer, forming a probe pad in the first opening and over the passivation layer, the probe pad being electrically connected to the first top metal structure, performing a circuit probe test on the probe pad, removing the probe pad, and forming a bond pad and a bond via in dielectric layers over the passivation layer, the bond pad and bond via being electrically coupled to a second top metal structure of the top metal structures and a third top metal structure of the top metal structures.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 16, 2024
    Inventors: Ching-Yu Huang, Ting-Chu Ko, Der-Chyang Yeh
  • Publication number: 20240162083
    Abstract: The present disclosure relates to a method for forming a semiconductor device includes forming an opening between first and second sidewalls of respective first and second terminals. The first and second sidewalls oppose each other. The method further includes depositing a first dielectric material at a first deposition rate on top portions of the opening and depositing a second dielectric material at a second deposition rate on the first dielectric material and on the first and second sidewalls. The second dielectric material and the first and second sidewalls entrap a pocket of air. The method also includes performing a treatment process on the second dielectric material.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chen-Han WANG, Keng-Chu LIN, Tetsuji UENO, Ting-Ting CHEN
  • Publication number: 20240162088
    Abstract: An integrated circuit device includes an interconnect layer, a memory structure, a third conductive feature, and a fourth conductive feature. The interconnect layer includes a first conductive feature and a second conductive feature. The memory structure is over and in contact with the first conductive feature. The memory structure includes at least a resistance switching element over the first conductive feature. The third conductive feature, including a first conductive line, is over and in contact with the second conductive feature. The fourth conductive feature is over and in contact with the memory structure. The fourth conductive feature includes a second conductive line, a top surface of the first conductive line is substantially level with a top surface of the second conductive line, and a bottom surface of the first conductive line is lower than a bottommost portion of a bottom surface of the second conductive line.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsia-Wei CHEN, Fu-Ting SUNG, Yu-Wen LIAO, Wen-Ting CHU, Fa-Shen JIANG, Tzu-Hsuan YEH
  • Patent number: 11984499
    Abstract: A trench silicon carbide metal-oxide semiconductor field effect transistor includes a silicon carbide semiconductor substrate and a trench metal-oxide semiconductor field effect transistor, the field effect transistor includes a trench vertically arranged and penetrating along a first horizontal direction, a gate insulating layer formed on an inner wall of the trench, a first poly gate formed on the gate insulating layer, a shield region formed outsides and below the trench, and a field plate arranged between a bottom wall of the trench and the shield region, and the field plate has semiconductor doping and is laterally in contact to a current spreading layer to deplete electrons of the current spreading layer when a reverse bias voltage is applied.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: May 14, 2024
    Assignee: SHANGHAI HESTIA POWER INC.
    Inventors: Chien-Chung Hung, Kuo-Ting Chu, Lurng-Shehng Lee, Chwan-Yin Li
  • Publication number: 20240153559
    Abstract: A memory architecture includes: a plurality of cell arrays each of which comprises a plurality of bit cells, wherein each of bit cells of the plurality of cell arrays uses a respective variable resistance dielectric layer to transition between first and second logic states; and a control logic circuit, coupled to the plurality of cell arrays, and configured to cause a first information bit to be written into respective bit cells of a pair of cell arrays as an original logic state of the first information bit and a logically complementary logic state of the first information bit, wherein the respective variable resistance dielectric layers are formed by using a same recipe of deposition equipment and have different diameters.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 9, 2024
    Inventors: Yu-Der CHIH, Chung-Cheng CHOU, Wen-Ting CHU
  • Patent number: 11976776
    Abstract: A stand adjustment device has a tripod-connecting member, a connecting seat, a proximal clamping plate, a boom-connecting tube, a locking shaft, and a manual operating member. The connecting seat is rotatably located around the tripod-connecting member. The proximal clamping plate is detachably attached to a side of the connecting seat. One end of the locking shaft is movably disposed in the boom-connecting tube. The boom is slidably mounted through the boom-connecting tube and the locking shaft. The locking shaft is slidably mounted through the boom-connecting tube, the proximal clamping plate, and the connecting seat such that the boom-connecting tube is rotatable relative to the connecting seat. The manual operating member and the locking shaft are configured to clamp the boom-connecting tube, the proximal clamping plate, and the connecting seat therebetween into a locked condition.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: May 7, 2024
    Assignee: RELIANCE INTERNATIONAL CORP.
    Inventors: Pei-Chi Chu, Cheng-Lin Ho, Chi-Chia Huang, Wei-Ting Chen
  • Patent number: 11980041
    Abstract: Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsia-Wei Chen, Wen-Ting Chu, Yu-Wen Liao
  • Publication number: 20240116148
    Abstract: A tool set includes a tool holder, a tool and a tool rack. The tool has a groove unit. The tool holder has a latch unit that engages the groove unit. The tool rack includes a rack body and a blocking member. When the tool holder is moved away from the rack body after the tool is moved into the rack body by the tool holder and after the blocking member moves to a blocking position, the tool is blocked by the blocking member so that the latch unit is separated from the groove unit and that the tool holder is separated from the tool.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu, Tike Hoong Phua, Li Yun Chee
  • Publication number: 20240116724
    Abstract: A container feeding device includes a casing and first and second latch members. The casing defines a lower retaining space for receiving a plurality of containers that are stacked on one another. The first latch member is operable to enter the lower retaining space for supporting a bottommost container, or leave the lower retaining space to release the bottommost container. The second latch member enters the lower retaining space to support a second bottommost container when the bottommost container is released by the first latch member.
    Type: Application
    Filed: July 27, 2023
    Publication date: April 11, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu, Arya Anil
  • Publication number: 20240114810
    Abstract: A semiconductor structure includes: an etch-stop dielectric layer overlying a substrate and including a first opening therethrough; a silicon oxide plate overlying the etch-stop dielectric layer and including a second opening therethrough; a first conductive structure including a first electrode and extending through the second opening and the first opening; a memory film contacting a top surface of the first conductive structure and including a material that provides at least two resistive states having different electrical resistivity; and a second conductive structure including a second electrode and contacting a top surface of the memory film.
    Type: Application
    Filed: April 20, 2023
    Publication date: April 4, 2024
    Inventors: Fu-Ting Sung, Jhih-Bin Chen, Hung-Shu Huang, Hong Ming Liu, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu
  • Publication number: 20240114698
    Abstract: A semiconductor device includes a substrate, a bottom electrode, a ferroelectric layer, a noble metal electrode, and a non-noble metal electrode. The bottom electrode is over the substrate. The ferroelectric layer is over the bottom electrode. The noble metal electrode is over the ferroelectric layer. The non-noble metal electrode is over the noble metal electrode.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Yu CHEN, Sheng-Hung SHIH, Fu-Chen CHANG, Kuo-Chi TU, Wen-Ting CHU, Alexander KALNITSKY
  • Patent number: 11944659
    Abstract: The invention provides a method for improving sarcopenia of a subject in need thereof by using Phellinus linteus, in which the method includes administering an effective dose of composition to the subject, and the composition includes Phellinus linteus (NITE BP-03321 and BCRC 930210) as an effective substance. By using the aforementioned composition including an extract of a fermented product of the Phellinus linteus and/or its derivative, diameters of myotubes, amounts of muscles and muscle muscular endurance can be maintained, thereby improving sarcopenia.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: April 2, 2024
    Assignee: GRAPE KING BIO LTD
    Inventors: Chin-Chu Chen, I-Chen Li, Tsung-Ju Li, Ting-Yu Lu, Yen-Po Chen
  • Publication number: 20240099517
    Abstract: A micro puree machine including a housing, a power shaft, a bowl assembly and a platform. The power shaft extends from the housing. The bowl assembly including at least one locking bowl element. The platform includes at least one complementary locking platform element that is configured to engage the at least one locking bowl element such that rotation of the bowl assembly relative to the platform is prevented at times the bowl assembly is positioned thereon. The platform is rotatable from a first position to a second position relative to the housing such that the platform raises the bowl assembly towards the power shaft during the rotation of the bowl assembly and platform. The raising of the bowl assembly facilitates connection between the power shaft and a blade assembly that is positioned in a lid assembly on the bowl assembly.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicant: SharkNinja Operating LLC
    Inventors: Pushan He, Ting Hua Zhang, Ping Chu
  • Publication number: 20240105718
    Abstract: Methods for fabricating an integrated circuit (IC) device with a protection liner between doped semiconductor regions are provided. An example IC device includes a channel material having a first face and a second face opposite the first face, a first doped region and a second doped region in the channel material, extending from the second face towards the first face by a first distance; and an insulator structure in a portion of the channel material between the first and second doped regions, the insulator structure extending from the second face towards the first face by a second distance greater than the first distance. The insulator structure includes a first portion between the second face and the first distance and a second portion between first distance and the second distance. The insulator structure includes a liner material on sidewalls of the first portion but absent on sidewalls of the second portion.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Tao Chu, Guowei Xu, Minwoo Jang, Yanbin Luo, Feng Zhang, Ting-Hsiang Hung, Chia-Ching Lin
  • Publication number: 20240105770
    Abstract: Embodiments disclosed herein include transistors and methods of forming transistors. In an embodiment, a transistor comprises a source, a drain, and a pair of spacers between the source and the drain. In an embodiment, a semiconductor channel is between the source and the drain, where the semiconductor channel passes through the pair of spacers. In an embodiment, the semiconductor channel has a first thickness within the pair of spacers and a second thickness between the pair of spacers, where the second thickness is less than the first thickness. In an embodiment, the transistor further comprises a gate stack over the semiconductor channel between the pair of spacers.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Inventors: Tao CHU, Guowei XU, Chia-Ching LIN, Minwoo JANG, Feng ZHANG, Ting-Hsiang HUNG
  • Patent number: 11944021
    Abstract: Some embodiments relate to an integrated circuit including one or more memory cells arranged over a semiconductor substrate between an upper metal interconnect layer and a lower metal interconnect layer. A memory cell includes a bottom electrode disposed over the lower metal interconnect layer, a data storage or dielectric layer disposed over the bottom electrode, and a top electrode disposed over the data storage or dielectric layer. An upper surface of the top electrode is in direct contact with the upper metal interconnect layer without a via or contact coupling the upper surface of the top electrode to the upper metal interconnect layer. Sidewall spacers are arranged along sidewalls of the top electrode, and have bottom surfaces that rest on an upper surface of the data storage or dielectric layer.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yang Chang, Wen-Ting Chu
  • Publication number: 20240096998
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
  • Publication number: 20240091893
    Abstract: A mounting frame for being mounted with either one of first and second screwdrivers, includes a main frame, a mounting seat, and first and second mounting plates. The mounting seat has a plate attachment hole set. The first mounting plate has a first seat attachment hole set operable to be connected to the plate attachment hole set, and a first driver attachment hole set for the first screwdriver to be attached thereto. The second mounting plate has a second seat attachment hole set operable to be connected to the plate attachment hole set, and a second driver attachment hole set for the second screwdriver to be attached thereto.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 21, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu
  • Publication number: 20240090659
    Abstract: A table stand includes a first pivoting stabilizer, a second pivoting stabilizer, a first height adjustable pole connected to the first pivoting stabilizer, a second height adjustable pole connected to the second pivoting stabilizer, a folding transmission mechanism separately connected to the first height adjustable pole and the second height adjustable pole, and a support crossbar connected to the folding transmission mechanism. The first pivoting stabilizer and the second pivoting stabilizer are movably connected to two ends of the support crossbar. Each of the first pivoting stabilizer and the second pivoting stabilizer includes a first blocking edge, a second blocking edge, and a first shaft sequentially passing through the first blocking edge and the second blocking edge. The support crossbar is disposed between the first blocking edge and the second blocking edge.
    Type: Application
    Filed: February 4, 2023
    Publication date: March 21, 2024
    Inventor: Shih-Ting Chu
  • Patent number: 11933359
    Abstract: A miniature linear guideway includes a rail, a slider, two circulation fittings and a retainer. The slider and the circulation fitting are set on the rail, so that a circulation channel is formed between the rail and the slider for the balls to run. The circulation fitting has several turning convex portions. The retainer has a plate portion and two retaining portions. The two ends of each retaining portion are connected to the plate portion by a positioning portion, and the plate portion is adjacent to the slider. The positioning portions of the retainer abut the turning convex portions. The width of the plate portion of the retainer is smaller than the distance between the turning convex portions of the circulation fitting. Thereby, the miniature linear guideway of the present invention can optimize the assembly efficiency, thereby realizing the purpose of automatic assembly.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: March 19, 2024
    Assignee: HIWIN TECHNOLOGIES CORP.
    Inventors: Jian-Ting Lin, Yung-Chin Chu