Abstract: In a display substrate, each of the first sub-pixel and the second sub-pixel includes a power signal line pattern which includes a power main body which includes a first portion and a second portion electrically connected; in the first sub-pixel, an orthographic projection of the first portion/second portion on the substrate overlaps/does not overlap an orthographic projection of a data line main body of the data line pattern in an adjacent sub-pixel along the first direction on the substrate; in the second sub-pixel, an orthographic projection of a data line main body of a second data line pattern on the substrate overlaps the orthographic projection of the first portion in an adjacent sub-pixel along the first direction on the substrate, and does not overlap the orthographic projection of the second portion in the adjacent sub-pixel along the first direction on the substrate.

Abstract: A display substrate includes: a base substrate; a plurality of sub-pixels, each sub-pixel including a light-emission device including a first electrode; a plurality of signal lines including at least a first signal line and a second signal line; a signal line lead in a non-display area; and a signal line transfer structure on the base substrate, wherein the signal line transfer structure is configured to connect the signal line lead and the second signal line, the signal line transfer structure and the first signal line are located in the same layer, and the signal line transfer structure is spaced apart from the first signal line. An orthographic projection of the first electrode of at least one of the sub-pixels on the base substrate at least partially overlaps with an orthographic projection of each of the first signal line and the signal line transfer structure on the base substrate.

Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a substrate; a first electrode; a second electrode; an organic light-emitting functional layer; a line scanning drive circuit located in a surrounding area; a first flat layer; a fixed potential signal line located in the surrounding area, wherein the fixed potential signal line includes a first and a second conductive parts; an overlapping area is formed between an orthographic projection of the second conductive part on the substrate and an orthographic projection of the line scanning drive circuit on the substrate; the second conductive part includes a plurality of first through holes; and a conductive connection layer; and the conductive connection layer and the second conductive part at least are in direct contact in the overlapping area between the second conductive part and the line scanning drive circuit.

Abstract: A display substrate, a method for manufacturing the display substrate, and a display device. In the display substrate, the first sub-pixel and the second sub-pixel each include: a power signal line pattern, at least part of the power signal line pattern extends along the second direction; and a power compensation pattern, at least part of the power compensation pattern extends along the first direction, the power signal line pattern and the power compensation pattern are both located on a side of the first data line pattern and the second data line pattern close to the substrate; the power compensation pattern is electrically connected to the power signal line pattern and a power signal line pattern in an adjacent sub-pixel along the first direction.

Abstract: An array substrate is provided. The array substrate includes first spacers arranged in a first array and second spacers arranged in a second array. A respective row of second spacers in the second array is between two respective rows of first spacers in the first array. A respective column of second spacers in the second array is between two respective columns of first spacers in the first array. A respective row of first spacers in the first array is between two respective rows of second spacers in the second array. A respective column of first spacers in the first array is between two respective columns of second spacers in the second array. A respective one of the first spacers is between a second subpixel aperture and a third subpixel aperture. A respective one of the second spacers is between the third subpixel aperture and a fourth subpixel aperture.

Abstract: An array substrate is provided. The array substrate includes a respective first anode electrically connected to a respective first light emitting element in a respective first subpixel; a respective second anode electrically connected to a respective second light emitting element in a respective second subpixel; a respective third anode electrically connected to a respective third light emitting element in a respective third subpixel; and a respective fourth anode electrically connected to a respective fourth light emitting element in a respective fourth subpixel. An orthographic projection of the respective third anode on a base substrate substantially covers an orthographic projection of the first initialization connecting line on the base substrate, and covers an orthographic projection of at least portion of the respective third voltage supply line on the base substrate.

Abstract: A display substrate and a display device are provided. A sub-pixel in the display substrate includes a light emitting element and a pixel circuit; the light emitting element includes a first electrode, a light emitting layer and a second electrode; the pixel circuit includes a driving transistor and a storage capacitor. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. In a same first color sub-pixel pair, an overlapping situation, of orthographic projections of the second electrode of one first pixel block and a gate electrode of the driving transistor of the one first pixel block on the base substrate, is the same as an overlapping situation, of orthographic projections of the second electrode of one second pixel block and a gate electrode of the driving transistor of the one second pixel block on the base substrate.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, an anode layer and a plurality of pixel driving circuits, the plurality of pixel driving circuits includes a first conductive layer and a second conductive layer; the anode layer includes a first anode, the second conductive layer includes a first conductive portion and a second conductive portion, the second conductive portion includes a main body, a heel block, and a connection block, the heel block is located at a side of the main body close to the first anode, and an orthographic projection of the first conductive portion on the base substrate is overlapped with an orthographic projection of the first anode on the base substrate, and an orthographic projection of the second conductive portion on base substrate is overlapped with an orthographic projection of the first anode on the base substrate.

Abstract: A display panel includes a substrate, and a plurality of pixel units arranged on the substrate in an array form and each including a plurality of subpixels. Each subpixel includes a subpixel driving circuitry, a planarization layer and an anode pattern laminated one on another, each anode pattern of at least a part of the subpixels includes a middle portion and a peripheral portion surrounding the middle portion, a groove is formed in a surface of the planarization layer away from the substrate, an orthogonal projection of the groove onto the substrate surrounds an orthogonal projection of the middle portion onto the substrate, and at least a part of an orthogonal projection of the peripheral portion onto the substrate is located within the orthogonal projection of the groove onto the substrate.

Abstract: A display substrate and a display device are provided. A sub-pixel of the display substrate includes a light emitting element and a pixel circuit which includes a first connecting portion, a driving transistor and a threshold compensation transistor, an electrode of the threshold compensation transistor is electrically connected with a gate electrode of the driving transistor through the first connecting portion. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. A ratio of an overlapping area between orthographic projections of the second electrode and the first connecting portion of the first pixel block on the base substrate to an overlapping area between orthographic projections of the second electrode and the first connecting portion of the second pixel block on the base substrate is in a range from 0.8 to 1.2.

Abstract: A display panel, comprising a first insulating structural layer, a first crack detection line, a second insulating structural layer and a second crack detection line which are sequentially arranged on a substrate, wherein the first crack detection line and the second crack detection line are both located in a peripheral area and are arranged around a display area, one end of the first crack detection line is configured to receive a detection signal, and the other end of the first crack detection line is configured to output a first output signal, and one end of the second crack detection line is configured to receive a detection signal and the other end of the second crack detection line is configured to output a second output signal.

Abstract: Provided is a display panel, including a display pixel unit located in a display region, the display pixel unit including a threshold compensation transistor, the threshold compensation transistor including a first channel and a second channel being connected by a conductive connection portion; a dummy pixel unit located in a dummy region; a first signal line located in the dummy region and configured to provide a constant voltage; and a first conductive block connected to the first signal line. The display pixel unit includes a first display pixel unit, the first display pixel unit is a display pixel unit adjacent to the dummy pixel unit in a row direction, and in a plan view of the display panel, the first conductive block at least partially overlaps the conductive connection portion of the threshold compensation transistor of the first display pixel unit. A display device is further provided.

Abstract: Disclosed are a display substrate and a display device. The display substrate includes: a base substrate, a first gate layer, a second gate layer and a first conductive layer. The first gate layer includes a reset signal line extending in a first direction, and a first electrode block; the second gate layer includes a second electrode block, wherein the second electrode block is configured to form a storage capacitor with the first electrode block; and the first conductive layer includes a power line extending in a second direction, wherein the reset signal line and the power line have a first overlapped region, and the second electrode block and the power line have a second overlapped region. The width of the power line located in the first overlapped region is smaller than the width of the power line located in the second overlapped region.

Abstract: A display substrate and a display device are provided. A sub-pixel of the display substrate includes a light emitting element and a pixel circuit which includes a first connecting portion, a driving transistor and a threshold compensation transistor, an electrode of the threshold compensation transistor is electrically connected with a gate electrode of the driving transistor through the first connecting portion. The sub-pixel includes a first color sub-pixel pair which includes a first pixel block and a second pixel block. A ratio of an overlapping area between orthographic projections of the second electrode and the first connecting portion of the first pixel block on the base substrate to an overlapping area between orthographic projections of the second electrode and the first connecting portion of the second pixel block on the base substrate is in a range from 0.8 to 1.2.

Abstract: The display substrate includes a substrate, multiple sub-pixels, multiple data lines, multiple power lines, multiple data signal input lines, multiple selector switches, a first power bus located in a peripheral area and on a side, facing away from the display area, of the multiple selector switches, and multiple power connection cables located in the peripheral area and between the first power bus and the multiple power lines. The multiple power connection cables are electrically connected with the first power bus and the multiple power lines.

Abstract: A display substrate includes: a base substrate including a display region and a non-display region surrounding the display region; a plurality of sub-pixels in the display region; a plurality of power lines in the display region, the plurality of power lines extending along a first direction, and being electrically connected to the plurality of sub-pixels and being configured to provide power signals for the plurality of sub-pixels; a plurality of dummy sub-pixels in the non-display region on one side of the display region along the first direction; and a plurality of dummy power lines in the non-display region, the plurality of dummy power lines extending along the first direction, the plurality of dummy power lines and the plurality of dummy sub-pixels being on the same side of the display region.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a display substrate, an IC chip, and a circuit board. The display substrate includes a first bonding portion including a first detection pin and a second detection pin, a second bonding portion connected to the first bonding portion and including a first connection pin and second connection pin which are connected by a connection wire included by the circuit board, a first connection line connecting the first detection pin to the first connection pin and including a first crack detection line, and a second connection line connecting the first detection pin to the second connection pin. The IC chip is bonded to the first bonding portion and configured to determine cracks on an edge of the display substrate according to electric signals of the first detection pin and the second detection pin.

Abstract: A display substrate and a display panel are disclosed. The display substrate includes a base substrate having an active area and a peripheral area surrounding the active area; a plurality of sub-pixels, in the active area; a plurality of first pins and a plurality of second pins located in the peripheral area; a plurality of first array test pins located between the plurality of first pins and the plurality of second pins and respectively electrically coupled to a plurality of array test signal lines; and a plurality of second array test pins located between the plurality of first pins and the plurality of second pins and extending in a direction along a boundary of the active area, wherein the plurality of first array test pins are located on at least one side of the plurality of second array test pins in the direction along the boundary of the active area.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, first color sub-pixels, data lines, and first power signal lines located on the base substrate. Each first color sub-pixel includes an organic light emitting element including a first electrode, a light emitting layer and a second electrode. The data lines are located between the second electrode and the base substrate. The first power signal lines are disposed in the same layer as the data lines. The display substrate further includes a first pad block disposed in the same layer as the data lines; the second electrode of each first color sub-pixel is overlapped with the data line, the first power signal line and the first pad block; and the first power signal line and the first pad block are located at both sides of the data line.

Abstract: A display substrate and a display device are disclosed. In the display substrate, a pixel defining layer includes a plurality of opening groups, each of the opening groups includes a first opening and a second opening, the spacer is located between the first opening of a first opening group row and the second opening of a second opening group row, an orthographic projection of the first opening includes a first long edge, and an orthographic projection of the second opening includes a second long edge, an orthographic projection of the spacer includes a third long edge, and an angle between the third long edge and the first long edge ranges from 20 degrees to 70 degrees, the orthographic projection of the first opening includes a first short edge, and the length of the third long edge is greater than a that of the first short edge.