Patents by Inventor Todd D. Farrell
Todd D. Farrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9378790Abstract: Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.Type: GrantFiled: August 2, 2012Date of Patent: June 28, 2016Assignee: Micron Technology, Inc.Inventors: Todd D. Farrell, Jeffrey P. Wright, Victor Wong, Alan J. Wilson
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Patent number: 8711651Abstract: Multi-rank memories and methods for self-refreshing multi-rank memories are disclosed. One such multi-rank memory includes a plurality of ranks of memory and self-refresh logic coupled to the plurality of ranks of memory. The self-refresh logic is configured to refresh a first rank of memory in a self-refresh state in response to refreshing a second rank of memory not in a self-refresh state in response to receiving a non-self-refresh refresh command for the second rank of memory.Type: GrantFiled: February 4, 2013Date of Patent: April 29, 2014Assignee: Micron Technology, Inc.Inventor: Todd D. Farrell
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Patent number: 8369178Abstract: Multi-rank memories and methods for self-refreshing multi-rank memories are disclosed. One such multi-rank memory includes a plurality of ranks of memory and self-refresh logic coupled to the plurality of ranks of memory. The self-refresh logic is configured to refresh a first rank of memory in a self-refresh state in response to refreshing a second rank of memory not in a self-refresh state in response to receiving a non-self-refresh refresh command for the second rank of memory.Type: GrantFiled: March 8, 2010Date of Patent: February 5, 2013Assignee: Micron Technology, Inc.Inventor: Todd D. Farrell
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Patent number: 8339888Abstract: A system with a memory device having programmable elements used to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device is incorporated into a system. Once the memory device is incorporated into a system, the programmable elements may be accessed by a processor such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for the memory device in the system.Type: GrantFiled: October 19, 2011Date of Patent: December 25, 2012Assignee: Round Rock Research, LLCInventors: Jeffrey W. Janzen, Scott Schaefer, Todd D. Farrell
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Publication number: 20120324179Abstract: Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.Type: ApplicationFiled: August 2, 2012Publication date: December 20, 2012Inventors: Todd D. Farrell, Jeffrey P. Wright, Victor Wong, Alan J. Wilson
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Publication number: 20120232716Abstract: A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.Type: ApplicationFiled: May 23, 2012Publication date: September 13, 2012Applicant: ROUND ROCK RESEARCH, LLCInventors: Jeff W. Janzen, Jeffrey P. Wright, Todd D. Farrell
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Patent number: 8250328Abstract: Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.Type: GrantFiled: March 24, 2009Date of Patent: August 21, 2012Assignee: Micron Technology, Inc.Inventors: Todd D. Farrell, Jeffrey P. Wright, Victor Wong, Alan J. Wilson
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Patent number: 8186878Abstract: A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.Type: GrantFiled: February 9, 2010Date of Patent: May 29, 2012Assignee: Round Rock Research, LLCInventors: Jeff W. Janzen, Jeffrey P. Wright, Todd D. Farrell
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Patent number: 8174858Abstract: Systems, memory modules and methods of configuring systems including memory modules are provided. The memory modules include device parameters specifically corresponding to memory devices of the memory module. The device parameters may be retrieved from a database, and the system may be configured in accordance with the device parameters retrieved from the database.Type: GrantFiled: January 20, 2010Date of Patent: May 8, 2012Assignee: Round Rock Research, LLCInventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Publication number: 20120036314Abstract: A system with a memory device having programmable elements used to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device is incorporated into a system. Once the memory device is incorporated into a system, the programmable elements may be accessed by a processor such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for the memory device in the system.Type: ApplicationFiled: October 19, 2011Publication date: February 9, 2012Applicant: ROUND ROCK RESEARCH, LLCInventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Patent number: 8045415Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.Type: GrantFiled: February 17, 2010Date of Patent: October 25, 2011Assignee: Round Rock Research, LLCInventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Publication number: 20110219182Abstract: Multi-rank memories and methods for self-refreshing multi-rank memories are disclosed. One such multi-rank memory includes a plurality of ranks of memory and self-refresh logic coupled to the plurality of ranks of memory. The self-refresh logic is configured to refresh a first rank of memory in a self-refresh state in response to refreshing a second rank of memory not in a self-refresh state in response to receiving a non-self-refresh refresh command for the second rank of memory.Type: ApplicationFiled: March 8, 2010Publication date: September 8, 2011Inventor: Todd D. Farrell
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Publication number: 20100332718Abstract: Memory devices, memory controllers, methods, and systems are provided, such as methods for masking the row cycle latency time of a memory array. In one embodiment, a memory device that is configurable to operate in full or reduced density modes is provided. In a reduced density mode, certain banks within the memory array function as duplicate memory banks associated with an addressable memory bank. Write operations performed in the reduced density mode may write a data segment to an addressed memory bank as well as its associated duplicate banks. When repeated read requests are issued for the data segment, the read requests may be interleaved between the addressed bank and its duplicate banks, thereby masking the row cycle time of each physical bank. That is, the interval between each read out of the data segment from the memory array will appear to be less than the row cycle time.Type: ApplicationFiled: June 26, 2009Publication date: December 30, 2010Applicant: Micron Technology, Inc.Inventors: Todd D. Farrell, Christopher S. Johnson
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Publication number: 20100250874Abstract: Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.Type: ApplicationFiled: March 24, 2009Publication date: September 30, 2010Inventors: Todd D. Farrell, Jeffrey P. Wright, Victor Wong, Alan J. Wilson
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Publication number: 20100142287Abstract: A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.Type: ApplicationFiled: February 9, 2010Publication date: June 10, 2010Applicant: Micron Technology, Inc.Inventors: Jeff W. Janzen, Jeffrey P. Wright, Todd D. Farrell
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Publication number: 20100142251Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.Type: ApplicationFiled: February 17, 2010Publication date: June 10, 2010Applicant: Micron Technology, Inc.Inventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Publication number: 20100122061Abstract: Systems, memory modules and methods of configuring systems including memory modules are provided. The memory modules include device parameters specifically corresponding to memory devices of the memory module. The device parameters may be retrieved from a database, and the system may be configured in accordance with the device parameters retrieved from the database.Type: ApplicationFiled: January 20, 2010Publication date: May 13, 2010Applicant: Micron Technology, Inc.Inventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Patent number: 7684276Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, or voltage and timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.Type: GrantFiled: February 5, 2009Date of Patent: March 23, 2010Assignee: Micron Technology, IncInventors: Jeffery W. Janzen, Scott Schaefer, Todd D. Farrell
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Patent number: 7677796Abstract: A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.Type: GrantFiled: October 22, 2008Date of Patent: March 16, 2010Assignee: Micron Technology, Inc.Inventors: Jeff W. Janzen, Jeffrey P. Wright, Todd D. Farrell
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Patent number: 7663901Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique device parameters corresponding to specific memory devices on the memory modules are accessed from a database such that the device parameters may be implemented to improve system performance. The device parameters may include sizes, speeds, operating voltages, or timing parameters of the memory modules. Memory modules comprising a number of volatile memory devices may be fabricated. Device parameters corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique device parameters corresponding to the specific memory devices on the memory modules.Type: GrantFiled: January 11, 2008Date of Patent: February 16, 2010Assignee: Micron Technology, Inc.Inventors: Jeffery W. Janzen, Scott Schaeffer, Todd D. Farrell