Patents by Inventor Todd Wayne Lumpkin

Todd Wayne Lumpkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for high speed data and command transfer over an interface where a non-maskable interrupt signal indicates either a write command or received data
    Patent number: 5943505
    Abstract: The apparatus and method for high speed data and command transfer over an interface (202), such as an ISA or PCMCIA bus or interface, includes a transceiver (206) and a processor (210) having a direct memory access (DMA) controller (240), a memory (211) for storage of data, and a channel interface (218) for connection to a communications channel. The processor (210) is responsive through a set of program instructions, such as software or firmware, to receive an interrupt signal (310, 315) and, when the interrupt signal indicates a write command (320, 330), to transfer data via the transceiver from the interface to the memory for transmission over the communications channel (335), and when the interrupt signal indicates data received from the communications channel (350), the processor further responsive to generate a read command and transfer data from the memory to the interface via the transceiver (355).
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 24, 1999
    Assignee: Motorola, Inc.
    Inventors: Todd Wayne Lumpkin, Timothy Lee Williams, Patrick J. Quirk
  • Apparatus and method for high speed data and command transfer over an interface
    Patent number: 5935220
    Abstract: The apparatus and method for high speed data and command transfer over an interface (202), such as an ISA or PCMCIA bus or interface, includes a transceiver (206) and a processor (210) having a direct memory access (DMA) controller (240), a memory (211) for storage of data, and a channel interface (218) for connection to a communications channel. The processor (210) is responsive through a set of program instructions, such as software or firmware, to receive an interrupt signal (310, 315) and, when the interrupt signal indicates a write command (320, 330), to transfer data via the transceiver from the interface to the memory for transmission over the communications channel (335), and when the interrupt signal indicates data received from the communications channel (350), the processor further responsive to generate a read command and transfer data from the memory to the interface via the transceiver (355).
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: August 10, 1999
    Assignee: Motorola Inc.
    Inventors: Todd Wayne Lumpkin, Timothy Lee Williams