Patents by Inventor Todd Witter
Todd Witter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220291733Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to reduce display connection latency. An example apparatus includes interface circuitry to: detect when a display is plugged into a port; and notify processor circuitry of the detection. In response to the notification, the processor circuitry of the example apparatus moves discrete circuitry into a high power state. The example apparatus also includes discrete circuitry to, while in the high power state, identify the display.Type: ApplicationFiled: June 2, 2022Publication date: September 15, 2022Inventors: Lakshminarayana Pappu, Nausheen Ansari, Todd Witter
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Publication number: 20220068242Abstract: Methods, systems and apparatuses may provide for a system memory, an external graphics source, and a host processor coupled to the system memory and the external graphics source. The host processor may include an integrated graphics source, an output port, a set of input pins, wherein the set if input pins are dedicated to the external graphics source, and a communication path between the set of input pins and the output port. In one example, the communication path bypasses the system memory and the integrated graphics source.Type: ApplicationFiled: August 26, 2020Publication date: March 3, 2022Inventors: Patrick Maloney, Robert Johnston, Sindhu Amireddy, Todd Witter
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Publication number: 20210090485Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.Type: ApplicationFiled: May 4, 2020Publication date: March 25, 2021Applicant: Intel CorporationInventors: Vishal Sinha, Paul Diefenbaugh, Todd Witter, Jason Tanner, Arthur Runyan, Nausheen Ansari, Kathy Bui, Yifan Li
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Patent number: 10643525Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.Type: GrantFiled: June 29, 2018Date of Patent: May 5, 2020Assignee: Intel CorporationInventors: Vishal Sinha, Paul Diefenbaugh, Todd Witter, Jason Tanner, Arthur Runyan, Nausheen Ansari, Kathy Bui, Yifan Li
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Patent number: 10559285Abstract: Disclosed herein are techniques to provide both asynchronous frame updates and panel self-refresh in a single implementation. A platform can be arranged to provide frame updates asynchronously with the refresh rate of a connected panel while the connected panel can be arranged to self-refresh where no new updates are provided.Type: GrantFiled: March 31, 2018Date of Patent: February 11, 2020Assignee: INTEL CORPORATIONInventors: Seh Kwa, Todd Witter, Nausheen Ansari, Gaurav Sutaria
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Publication number: 20190051269Abstract: Disclosed herein are techniques to provide both asynchronous frame updates and panel self-refresh in a single implementation. A platform can be arranged to provide frame updates asynchronously with the refresh rate of a connected panel while the connected panel can be arranged to self-refresh where no new updates are provided.Type: ApplicationFiled: March 31, 2018Publication date: February 14, 2019Inventors: Seh Kwa, Todd Witter, Nausheen Ansari, Gaurav Sutaria
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Publication number: 20190043415Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.Type: ApplicationFiled: June 29, 2018Publication date: February 7, 2019Applicant: Intel CorporationInventors: Vishal Sinha, Paul Diefenbaugh, Todd Witter, Jason Tanner, Arthur Runyan, Nausheen Ansari, Kathy Bui, Yifan Li
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Patent number: 10115392Abstract: A method for adjusting a voice recognition system and a voice recognition system is disclosed, wherein the voice recognition system comprises a speaker and a microphone, and wherein the method comprises the steps of: memorizing an audio frequency signal, playing back the audio frequency signal by means of the speaker, generating a detection signal by detecting the audio frequency signal by means of the microphone, and adjusting parameters of the voice recognition system dependent on the detection signal.Type: GrantFiled: June 3, 2010Date of Patent: October 30, 2018Assignee: VISTEON GLOBAL TECHNOLOGIES, INC.Inventors: Michael J. Sims, Brian L. Douthitt, David J. Hughes, Mark Zeinstra, Ted W. Ringold, Douglas W. Klamer, Todd Witters, Elisabet A. Anderson
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Patent number: 9542336Abstract: A processing device comprises an instruction execution unit, a memory agent and pinning logic to pin memory pages in a multi-level memory system upon request by the memory agent. The pinning logic includes an agent interface module to receive, from the memory agent, a pin request indicating a first memory page in the multi-level memory system, the multi-level memory system comprising a near memory and a far memory. The pinning logic further includes a memory interface module to retrieve the first memory page from the far memory and write the first memory page to the near memory. In addition, the pinning logic also includes a descriptor table management module to mark the first memory page as pinned in the near memory, wherein marking the first memory page as pinned comprises setting a pinning bit corresponding to the first memory page in a cache descriptor table and to prevent the first memory page from being evicted from the near memory when the first memory page is marked as pinned.Type: GrantFiled: December 18, 2013Date of Patent: January 10, 2017Assignee: Intel CorporationInventors: Marc Torrant, David Puffer, Blaise Fanning, Bryan White, Joydeep Ray, Neil Schaper, Todd Witter, Altug Koker, Aditya Sreenivas
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Publication number: 20150169439Abstract: A processing device comprises an instruction execution unit, a memory agent and pinning logic to pin memory pages in a multi-level memory system upon request by the memory agent. The pinning logic includes an agent interface module to receive, from the memory agent, a pin request indicating a first memory page in the multi-level memory system, the multi-level memory system comprising a near memory and a far memory. The pinning logic further includes a memory interface module to retrieve the first memory page from the far memory and write the first memory page to the near memory. In addition, the pinning logic also includes a descriptor table management module to mark the first memory page as pinned in the near memory, wherein marking the first memory page as pinned comprises setting a pinning bit corresponding to the first memory page in a cache descriptor table and to prevent the first memory page from being evicted from the near memory when the first memory page is marked as pinned.Type: ApplicationFiled: December 18, 2013Publication date: June 18, 2015Inventors: Marc Torrant, David Puffer, Blaise Fanning, Bryan White, Joydeep Ray, Neil Schaper, Todd Witter, Altug Koker, Aditya Sreenivas
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Patent number: 8314806Abstract: A controller is described that includes wiring to transport notification that a FIFO that holds data to be used to display content on a display has reached a threshold. The controller also includes first control circuitry to turn on a phase locked loop (PLL) circuit to cause logic circuitry within the controller downstream from the PLL to begin to receive a first clock in response to the notification. The logic circuitry is to transport data read from a memory toward the FIFO. The controller also includes second control circuitry to cause the memory to use a second clock provided by the controller in response to the notification.Type: GrantFiled: April 13, 2006Date of Patent: November 20, 2012Assignee: Intel CorporationInventors: Eric Samson, Aditya Navale, Todd Witter
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Publication number: 20110301954Abstract: A method for adjusting a voice recognition system and a voice recognition system is disclosed, wherein the voice recognition system comprises a speaker and a microphone, and wherein the method comprises the steps of: memorizing an audio frequency signal, playing back the audio frequency signal by means of the speaker, generating a detection signal by detecting the audio frequency signal by means of the microphone, and adjusting parameters of the voice recognition system dependent on the detection signal.Type: ApplicationFiled: June 3, 2010Publication date: December 8, 2011Applicant: Johnson Controls Technology CompanyInventors: Michael J. Sims, Brian L. Douthitt, David J. Hughes, Mark Zeinstra, Ted W. Ringold, Douglas W. Klamer, Todd Witters, Elisabet A. Anderson
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Publication number: 20070242076Abstract: A controller is described that includes wiring to transport notification that a FIFO that holds data to be used to display content on a display has reached a threshold. The controller also includes first control circuitry to turn on a phase locked loop (PLL) circuit to cause logic circuitry within the controller downstream from the PLL to begin to receive a first clock in response to the notification. The logic circuitry is to transport data read from a memory toward the FIFO. The controller also includes second control circuitry to cause the memory to use a second clock provided by the controller in response to the notification.Type: ApplicationFiled: April 13, 2006Publication date: October 18, 2007Inventors: Eric Samson, Aditya Navale, Todd Witter
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Publication number: 20070086673Abstract: A method of reducing video flicker by adaptive filtering may include receiving a group of lines of video data and detecting one or more edges within the group of lines of video data. Pixels that are associated with the one or more edges may be filtered using a first set of filter coefficients. Pixels that are not associated with the one or more edges using may be filtered a second set of filter coefficients that is different from the first set of filter coefficients.Type: ApplicationFiled: October 14, 2005Publication date: April 19, 2007Inventors: Todd Witter, Satya Avadhanam
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Publication number: 20070070258Abstract: An apparatus which switches between video display modes, including a display panel having multiple display pixels formed in a matrix; a display controller coupled to the display panel and including a detector to detect a phase differential between received timing signals and output a synchronous determination signal, and a control signal generator coupled to the detector, the control signal generator to generate a first set of control signals corresponding to a first driving mode or a second set of control signals corresponding to a second driving mode in accordance with the synchronous determination signal, the first set of control signals to cause the display panel to display images in accordance with the first driving mode using a first set of selected display pixels, and the second set of control signals to cause the display panel to display images in accordance with the second driving mode using a second set of selected display pixels, with the second set having a number of selected display pixels differType: ApplicationFiled: June 28, 2006Publication date: March 29, 2007Applicant: Toshiba Matsushita Display Technology Co., Ltd.Inventors: Kouhei Kinoshita, Hirofumi Kato, Yasuhiro Yamashita, Atsuo Okazaki, Maximino Vasquez, Todd Witter, Sylvia Downing, Trudy Hoekstra, Kristine Karnos, Zudan Shi
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Publication number: 20070002168Abstract: A system, apparatus, method and article to switch between video display modes are described. The apparatus may include a graphics device to switch between a progressive mode and an interlaced mode to display media information using a single pixel clock frequency for both modes. Other embodiments are described and claimed.Type: ApplicationFiled: June 29, 2005Publication date: January 4, 2007Inventors: Maximino Vasquez, Todd Witter, Sylvia Downing, Trudy Hoekstra, Kristine Karnos, Zudan Shi
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Publication number: 20050044334Abstract: A method and apparatus for managing overlay data requests are disclosed. One embodiment of an apparatus includes a request unit and a timer. A request is made by a graphics controller to the request unit for a line of overlay data. The request unit divides the request from the graphics controller into a series of smaller requests. The smaller requests are issued to a memory controller. Delays are inserted between each of the smaller requests in order to allow other system resources to more easily gain access to memory.Type: ApplicationFiled: September 26, 2003Publication date: February 24, 2005Inventors: Todd Witter, Aditya Sreenivas, Kim Meinerth