Patents by Inventor Tohru Aoyama

Tohru Aoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6281097
    Abstract: There is provided a method of fabricating a semiconductor device, including the steps of forming an insulating film and an electrically conductive film on a silicon substrate, forming a first opening in the insulating film and a second opening in the electrically conductive film, the second opening having a smaller length than the first opening so that tunnel portions are formed in the insulating film below the electrically conductive film, and forming a Si1-xGex base epitaxial layer on the silicon substrate in the first opening of the insulating film, wherein a process gas for growing the Si1-xGex base epitaxial layer includes disilane, an etching gas includes chlorine, a ratio of the chlorine to the disilane is greater than {fraction (1/50)}, and a growth temperature is smaller than 640° C. In accordance with the method, it is possible to form a SiGe base epitaxial film having a greater thickness at opposite ends thereof than a thickness at the center thereof.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: August 28, 2001
    Assignee: NEC Corporation
    Inventor: Tohru Aoyama
  • Patent number: 6228166
    Abstract: In order to reduce boron concentration between a silicon substrate and an Si or Si1-xGex layer which is epitaxially grown in a CVD (chemical vapor deposition) apparatus, the silicon substrate is pretreated, before being loaded into the CVD apparatus, such as to prevent the substrate from being contaminated by boron in a clean room. Further, in accordance with one embodiment, a CVD growth chamber itself is cleaned, before the substrate is loaded into the growth chamber, using an F2 gas at a predetermined temperature of the substrate, thereby to remove boron residues in the growth chamber.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: May 8, 2001
    Assignee: NEC Corporation
    Inventors: Tatsuya Suzuki, Tohru Aoyama
  • Patent number: 6150221
    Abstract: It is an object of the invention to provide a CMOS device comprising p-channel FETs having shallow source and drain regions and a method for fabricating the same. A B-doped selective epitaxial layer is grown only on an area, where the source and drain regions of the p-channel FET is to be formed. Growth of the B-doped selective epitaxial layer on an area, where the source and drain regions of a n-channel FET is to be formed, is impeded by forming a amorphous region on the area corresponding to the n-channel FET.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventor: Tohru Aoyama
  • Patent number: 5951774
    Abstract: A vapor-phase growth system able to avoid fluctuation of the heating performance of a heater during repeated growth processes is provided. This system includes a reactor, a substrate holder for holding a substrate, and a heater for heating the substrate held by the holder. The holder and the heater are placed in an inner space of the reactor. The holder and the substrate held by the holder divide an inner space of the reactor to thereby form a growth chamber in which a thin film is grown during a growth process and a heater chamber in which the heater is placed. The holder has a supporting member on which the substrate is placed. At least a part of the member is made of the same material as that of the thin film. The supporting member is made of a SOI substrate.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: September 14, 1999
    Assignee: NEC Corporation
    Inventors: Seiichi Shishiguchi, Tohru Aoyama, Tatsuya Suzuki
  • Patent number: 5633040
    Abstract: A film treating method treats a resist film which is formed on a substrate by spin coating. The method comprises a step for coating resist on the substrate to form the resist film, a step for conveying the substrate to a region having an atmosphere of a saturated vapor or a super-saturated vapor of solvent before the solvent contained in the resist film is lost, a step for executing a first heating process wherein the substrate is heated at a temperature which lowers the viscosity of the resist film and permits solvent to remain in the resist film in an amount sufficient to maintain the fluidity of the resist film, a step for conveying the substrate away from the region having the atmosphere of the saturated vapor or the super-saturated vapor of solvent, and a step for executing a second heating process wherein the substrate is heated at a temperature higher than that of the first heating process, thereby permitting the solvent to evaporate from the resist film.
    Type: Grant
    Filed: May 20, 1994
    Date of Patent: May 27, 1997
    Assignee: Tokyo Electron Limited
    Inventors: Takayuki Toshima, Tohru Aoyama
  • Patent number: 4282785
    Abstract: An electronic musical instrument which is provided with a note frequency data memory for storing note frequency data corresponding to data of key switch depression through a key code register, a note frequency data register for latching and storing the data from the note frequency data memory by a time division pulse from a time division control signal generator, an octave data register for latching and storing octave data from the key code register by the time division pulse from the time division control signal generator, a frequency generator composed of a programmable counter supplied with the output from the note frequency data register to provide a frequency corresponding thereto, a frequency divider array supplied with the frequency and a decoder supplied with the output from the octave data register, the outputs from the respective output ends of the frequency divider array being selected by the output from the decoder in accordance with the octave data, and a musical waveform generator composed of fi
    Type: Grant
    Filed: October 17, 1977
    Date of Patent: August 11, 1981
    Assignee: Kabushiki Kaisha Kawai Gakki Seisakusho
    Inventors: Nobuharu Obayashi, Hikaru Hashizume, Seiji Kameyama, Sadaaki Ezawa, Tatsunori Kondo, Kiyomi Takauji, Tohru Aoyama