Abstract: A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.

Abstract: A plasma processing apparatus includes a chamber in which a plate to be processed is contained, an introductory port via which a hydrogen-atom-containing gas is guided into the chamber, a lower electrode on which the plate is laid in the chamber, an upper electrode disposed opposite to the lower electrode and causing electric discharge in the chamber to produce a plasma, a power supply which supplies voltage between the lower and upper electrodes, and a metal oxide structural body disposed in a part in the chamber, the metal oxide structural body being reduced when the hydrogen-atom-containing gas is introduced.

Abstract: This invention provides the following high-rate silicon etching method. An object to be processed W having a silicon region is so set as to be in contact with a process space in a process chamber that can be held in vacuum. An etching gas is introduced into the process space to form a gas atmosphere at a gas pressure of 13 Pa to 1,333 Pa (100 mTorr to 10 Torr). A plasma is generated upon application of RF power. In the plasma, the sum of the number of charged particles such as ions and the number of radicals increases, and etching of the silicon region is performed at a higher rate than in conventional etching.

Abstract: A method for fabricating a pattern, includes: delineating a mask pattern on at least a portion of an underlying layer; etching a portion of the mask pattern; irradiating an incident light on the mask pattern to which the etching is performed and detecting a reflected light produced by reflecting the incident light after the incident light is transmitted through the mask pattern; obtaining a reflected interference spectrum; and calculating a pattern width of the mask pattern using data of the reflected interference spectrum, the reflected interference spectrum being in a wavelength range of not less than two times a pitch of the mask pattern.

Abstract: There is disclosed a semiconductor processing apparatus comprising a process chamber treating a substrate, a process gas feeder feeding a process gas to the process chamber, a first vacuum pump exhausting the process chamber, a second vacuum pump inhaling gas on an exhaust side of the first vacuum pump, and a circulation path circulating at least a part of the process gas exhausted from the process chamber via the first vacuum pump into the process chamber, wherein the circulation path is provided with a dust trapping mechanism, the dust trapping mechanism being capable of substantially maintaining a conductance of the circulation path before and after the capture of dust.

Abstract: A method of manufacturing a semiconductor device comprises forming a first low dielectric constant insulating film over a semiconductor substrate, forming a photoresist pattern on the first low dielectric constant insulating film, etching the first low dielectric constant insulating film to form a concave portion therein, using the photoresist pattern, burying a conductive film in the concave portion after the photoresist pattern is removed, removing an altered layer formed on a sidewall of the concave portion of the first low dielectric constant insulating film after the conductive film is buried, the altered layer being formed when the photoresist pattern is removed, and forming a second low dielectric constant insulating film so as to fill a gap of the sidewall of the concave portion therewith, the gap resulting from removing the altered layer.

Abstract: Disclosed is a method for manufacturing a semiconductor device comprising forming, above a semiconductor substrate on which elements are formed, a wiring layer with a metal nitride film on its surface, forming an insulating film on the wiring layer, forming a mask pattern on the insulating film, forming a via hole in the insulating film by reactive ion etching using the mask pattern as an etching mask, thereby exposing the metal nitride film, removing the mask pattern, and performing plasma treatment of a surface of the metal nitride film using a nitrogen-containing gas.

Abstract: A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.

Abstract: A plasma processing method comprises placing a substrate to be processed in a chamber having an inner wall, subjecting the substrate to plasma processing while the inner wall is set to a first temperature, and cleaning the inner wall by using plasma while the inner wall is set to a second temperature higher than the first temperature.

Abstract: In dry etching a semiconductor workpiece, a mixture of a carbon-free, fluorine-containing gas and a fluorine-free, carbon-containing gas is used as an etching gas.

Abstract: A method of making a semiconductor device, comprises preparing a plurality of lots each including semiconductor substrates to be processed, the plurality of lots including at least first and second lots, processing the plurality of lots for every one lot, using a semiconductor manufacturing apparatus, judging whether or not the semiconductor manufacturing apparatus is subjected to cleaning before the second lot is processed, depending upon both a first processing type of the first lot to be processed and a second processing type of the second lot to be processed after the first lot, and processing the second lot without the cleaning in the case where the second lot does not require the cleaning.

Abstract: A gas recirculation flow control method and apparatus for use in an evacuation system having a vacuum chamber into which a gas is introduced, a first vacuum pump for exhausting the gas from the vacuum chamber and reducing the pressure in the vacuum chamber to a desired pressure, a second vacuum pump for performing evacuation to lower the back pressure of the first vacuum pump below an allowable back pressure, and a gas recirculation line for returning a part of gas exhausted from the first vacuum pump to the vacuum chamber.

Abstract: A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.

Abstract: A plasma processing apparatus includes upper and lower electrodes opposed to each other in an evacuated vessel, a first high-frequency power supply for applying power having a frequency of 27.12 MHz to the lower electrode, a second high-frequency power supply for applying power having a frequency of 3.1 MHz thereto, and a dipole ring for forming a magnetic field between the upper and lower electrodes.

Abstract: A method of forming a pattern comprising the steps of, forming a lower film on a substrate, the lower film being a film containing carbon atom at a ratio of 80 wt % or more, or a vapor phase deposition film, either applying an adhesion-promoting treatment to a surface of the lower film or forming an adhesion-promoting on the lower film, forming an intermediate film on a surface of the lower film, forming a resist film on the intermediate film, forming a resist pattern by conducting a patterning exposure of the resist film, forming an intermediate film pattern by transferring the resist pattern to the intermediate film, and forming a lower film pattern by transferring the intermediate film pattern to the lower film.

Abstract: A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.

Abstract: The present invention intends to provide a semiconductor device capable of realizing a thin gate stack and the manufacturing method thereof. A gate cap layer and/or a protection insulating film (an etching stopper) has a plurality of insulating materials such as oxide and nitride stacked on each other. With this structure, an insulating layer having an etching rate lower than that of the interlayer insulating layer, for example, can be exposed during the etching of the interlayer insulating layer, and the gate stack can be formed thin and the aspect ratio of the contact hole formed in the device can be reduced. The present invention can realize a thin gate stack in such a manner, and thus is suitable for a SAC used in a DRAM.

Abstract: There is disclosed a semiconductor processing apparatus comprising a process chamber treating a substrate, a process gas feeder feeding a process gas to the process chamber, a first vacuum pump exhausting the process chamber, a second vacuum pump inhaling gas on an exhaust side of the first vacuum pump, and a circulation path circulating at least a part of the process gas exhausted from the process chamber via the first vacuum pump into the process chamber, wherein the circulation path is provided with a dust trapping mechanism, the dust trapping mechanism being capable of substantially maintaining a conductance of the circulation path before and after the capture of dust.

Abstract: The present invention intends to provide a semiconductor device capable of realizing a thin gate stack and the manufacturing method thereof. A gate cap layer and/or a protection insulating film (an etching stopper) has a plurality of insulating materials such as oxide and nitride stacked on each other. With this structure, an insulating layer having an etching rate lower than that of the interlayer insulating layer, for example, can be exposed during the etching of the interlayer insulating layer, and the gate stack can be formed thin and the aspect ratio of the contact hole formed in the device can be reduced. The present invention can realize a thin gate stack in such a manner, and thus is suitable for a SAC used in a DRAM.

Abstract: Disclosed is a plasma processing method, in which a process gas is introduced into an evacuated process chamber for subjecting a target object to a plasma processing. The plasma processing method is featured in that at least a part of the process gas exhausted from the process chamber is introduced again into the process chamber. A specified value is obtained by monitoring the state of the plasma of the process gas within the process chamber, and the introducing conditions of the process gas into the process chamber are controlled to adjust a predetermined property value to a regulated value.