Abstract: A method for fabricating a non-volatile, ferroelectric random access memory (F-RAM) device with a reduced number of masking and etching steps is described. In one embodiment, the method includes forming an opening in an insulating layer over a surface of a substrate to expose a portion of the surface, and forming first spacers on sidewalls of the opening. A conductive layer is formed on the portion of the surface exposed in the opening and separated from the first spacers on the sidewalls of the opening by a gap therebetween. A bottom electrode of a ferroelectric capacitor is formed over the conductive layer and in the gap laterally of the conductive layer, a ferroelectric dielectric formed on the bottom electrode between the first spacers, and a top electrode formed on the ferroelectric dielectric.

Abstract: An encapsulated ferroelectric capacitor or ferroelectric memory cell includes encapsulation materials adjacent to a ferroelectric capacitor, a ferroelectric oxide (FEO) layer over the encapsulated ferroelectric capacitor, and an FEO encapsulation layer over the ferroelectric oxide to provide protection from hydrogen induced degradation.

Abstract: An encapsulated ferroelectric capacitor or ferroelectric memory cell includes encapsulation materials adjacent to a ferroelectric capacitor, a ferroelectric oxide (FEO) layer over the encapsulated ferroelectric capacitor, and an FEO encapsulation layer over the ferroelectric oxide to provide protection from hydrogen induced degradation.

Abstract: A method for a non-volatile, ferroelectric random access memory (F-RAM) device that includes a ferroelectric capacitor aligned with a preexisting structure is described. In one embodiment, the method includes forming an opening in an insulating layer over a contact in a planar surface of a substrate to expose at least a portion of the contact. Next a self-aligned contact (SAC) is formed electrically coupling to the contact, the SAC medially located in the opening and proximal to a sidewall thereof. A ferroelectric spacer is then formed in the opening medially of the SAC, and a top electrode spacer formed in the opening over the insulating cap and medially of the ferroelectric spacer.

Abstract: A method for fabricating a non-volatile, ferroelectric random access memory (F-RAM) device is described. In one embodiment, the method includes forming an opening in an insulating layer over a surface of a substrate, and forming bottom electrode spacers proximal to sidewalls of the opening. Next, a ferroelectric dielectric layer is formed in the opening over the surface of the substrate and between the bottom electrode spacers, and a pair of top electrodes is formed within the opening comprising first and second side portions displaced laterally from respective ones of the bottom electrode spacers by the ferroelectric dielectric layer.

Abstract: The ferroelectric thin film is formed from a liquid composition by the sol-gel processing which has a large amount of polarization, remarkably improved retention and imprint characteristics as compared with a PZT, minute grains and fine film quality, homogeneous electrical properties, and low leakage currents and which is suited for nonvolatile memories. The ferroelectric thin film of the present invention comprising a metal oxide represented by the general formula: (PbV CaW SrX LaY)(ZrZ Ti1−Z)O3, wherein 0.9≦V≦1.3, 0≦W≦0.1, 0≦X≦0.1, 0<Y≦0.1, 0<Z≦0.

Abstract: The ferroelectric thin film is formed from a liquid composition by the sol-gel processing which has a large amount of polarization, remarkably improved retention and imprint characteristics as compared with a PZT, minute grains and fine film quality, homogeneous electrical properties, and low leakage currents and which is suited for nonvolatile memories. The ferroelectric thin film of the present invention comprising a metal oxide represented by the general formula: (Pbv Caw SrX LaY)(ZrZ Ti1−Z)O3, wherein 0.9≦V≦1.3, 0≦W≦0.1, 0≦X≦0.1, 0<Y≦0.1, 0<Z≦0.