Abstract: Systems and methods which implement an image reconstruction framework to incorporate complex motion of structure, such as complex deformation of an object or objects being imaged, in image reconstruction techniques are shown. For example, techniques are provided for tracking organ motion which uses raw time-stamped data provided by any of a number of imaging modalities and simultaneously reconstructs images and estimates deformations in anatomy. Operation according to embodiments reduces artifacts, increase the signal-to-noise ratio (SNR), and facilitates reduced image modality energy dosing to patients. The technology also facilitates the incorporation of physical properties of organ motion, such as the conservation of local tissue volume. This approach is accurate and robust against noise and irregular breathing for tracking organ motion.

Abstract: Systems and methods which implement an image reconstruction framework to incorporate complex motion of structure, such as complex deformation of an object or objects being imaged, in image reconstruction techniques are shown. For example, techniques are provided for tracking organ motion which uses raw time-stamped data provided by any of a number of imaging modalities and simultaneously reconstructs images and estimates deformations in anatomy. Operation according to embodiments reduces artifacts, increase the signal-to-noise ratio (SNR), and facilitates reduced image modality energy dosing to patients. The technology also facilitates the incorporation of physical properties of organ motion, such as the conservation of local tissue volume. This approach is accurate and robust against noise and irregular breathing for tracking organ motion.

Abstract: Embodiments related to multiplexer latches (mux-latches) are presented herein.

Abstract: Embodiments related to multiplexer latches (mux-latches) are presented herein.

Abstract: Embodiments of the present invention relate to a system and method for associating a register file cache with a register file in a computer processor.

Abstract: A logic circuit includes a data-enable controller for outputting a data value. When implemented as a master-slave flip-flop, a data enable signal controls the activation of a master stage of the flip-flop in conjunction with the transitioning edge of an input clock signal. The data enable signal also controls the feedback of a logical value stored in the slave stage to a storage node of the master stage. Operation of the slave stage may be controlled by the input clock signal only. Through this structural configuration, the flip-flop or latch outputs logical values without requiring any additional forward-path delay elements. As a result, these devices are faster and more efficient than conventional circuits.

Abstract: A logic circuit includes a data-enable controller for outputting a data value. When implemented as a master-slave flip-flop, a data enable signal controls the activation of a master stage of the flip-flop in conjunction with the transitioning edge of an input clock signal. The data enable signal also controls the feedback of a logical value stored in the slave stage to a storage node of the master stage. Operation of the slave stage may be controlled by the input clock signal only. Through this structural configuration, the flip-flop or latch outputs logical values without requiring any additional forward-path delay elements. As a result, these devices are faster and more efficient than conventional circuits.

Abstract: A circuit including a differential sense circuit and a latch, the differential sense circuit and the latch coupled so as to form a differential sense latch such that, in operation, an electronic signal stored in the latch is retained for at least one clock cycle.