Patents by Inventor Tom Pawlowski

Tom Pawlowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087149
    Abstract: A method for depth mapping includes providing a depth mapping device comprising a projector, which is configured to project a pattern of optical radiation onto a target area over a first field of view about a projection axis, and a camera, which is configured to capture images of the target area within a second field of view, narrower than the first field of view, about a camera axis, which is offset transversely relative to the projection axis. The projector projects the pattern onto first and second planes at first and second distances from the camera, and the camera captures first and second reference images containing first and second parts of the pattern on the first and second planes, respectively. The first and second reference images are combined to produce an extended reference image including both the first and second parts of the pattern.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Shay Yosub, Noam Badt, Boris Morgenstein, Yuval Vardi, David Pawlowski, Assaf Avraham, Pieter Spinnewyn, Tom Levy, Yohai Zmora
  • Patent number: 6128244
    Abstract: The invention provides a memory access system and method of operation particularly useful with electronic storage devices having two or more memory units. Accessing of the memory units occurs one at a time and takes place using shared resources, such as shared row and column decoders. In a preferred embodiment, the invention permits the parallel reading of data from one memory unit of a plurality of memory units during a single system clock cycle using shared resources to perform addressing (e.g., read or write access) for the memory unit. The same shared resources are then used by any one of the other memory units during a subsequent system clock cycle to perform its own access function. By reading (or writing) data from (or to) one memory unit only during a single system clock cycle, the shared row and column decoders (and their attendant address lines) become available in a subsequent system clock cycle for use by another memory unit.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: October 3, 2000
    Assignee: Micron Technology, Inc.
    Inventors: William N. Thompson, J. David Porter, Larren G. Weber, John Wilford, Tom Pawlowski