Patents by Inventor Tom Verbeure

Tom Verbeure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150109286
    Abstract: A system, method, and computer program product are provided for combining low motion blur and variable refresh rate in a display. In one embodiment, a hold-type display is operated in a first mode of operation where the hold-type display is dynamically refreshed such that the hold type display handles updates to image frames at unpredictable times and where for each of the image frames a backlight of the hold-type display is activated for an entire duration of display of the image frame. Additionally, it is determined that at least one predefined condition has been met. Further, in response to the determination, the hold-type display is operated in a second mode of operation where the hold-type display is statically refreshed such that the hold-type display handles updates to image frames at regular intervals and where for each of the image frames the backlight of the hold-type display is flashed.
    Type: Application
    Filed: October 18, 2013
    Publication date: April 23, 2015
    Applicant: NVIDIA Corporation
    Inventors: Tom Verbeure, Gerrit A. Slavenburg, Thomas F. Fox, Robert Jan Schutten, Luis Mariano Lucas, Marcel Dominicus Janssens
  • Patent number: 8797340
    Abstract: A system, method, and computer program product are provided for modifying a pixel value as a function of a display duration estimate. In use, a value of a pixel of an image frame to be displayed on a display screen of a display device is identified, wherein the display device is capable of handling updates at unpredictable times. Additionally, the value of the pixel is modified as a function of an estimated duration of time until a next update including the pixel is to be displayed on the display screen. Further, the modified value of the pixel is transmitted to the display screen for display thereof.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 5, 2014
    Assignee: NVIDIA Corporation
    Inventors: Gerrit A. Slavenburg, Tom Verbeure, Robert Jan Schutten
  • Publication number: 20140181769
    Abstract: In an integrated circuit device, a power circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The device includes a power circuit disposed along the periphery of the device, the power circuit configured to maintain power when the device is placed in a low-power mode. A plurality of input output blocks are included in the device and are for receiving external inputs for the integrated circuit device and for providing outputs from the integrated circuit device. The power circuit is coupled to provide power to at least one of the input output blocks to maintain state when the integrated circuit device is in the low-power mode.
    Type: Application
    Filed: December 10, 2013
    Publication date: June 26, 2014
    Applicant: Nvidia Corporation
    Inventor: Tom Verbeure
  • Publication number: 20140092150
    Abstract: A system, method, and computer program product are provided for modifying a pixel value as a function of a display duration estimate. In use, a value of a pixel of an image frame to be displayed on a display screen of a display device is identified, wherein the display device is capable of handling updates at unpredictable times. Additionally, the value of the pixel is modified as a function of an estimated duration of time until a next update including the pixel is to be displayed on the display screen. Further, the modified value of the pixel is transmitted to the display screen for display thereof.
    Type: Application
    Filed: March 14, 2013
    Publication date: April 3, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Gerrit A. Slavenburg, Tom Verbeure, Robert Jan Schutten
  • Patent number: 8607177
    Abstract: In an integrated circuit device, a power circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The device includes a power circuit disposed along the periphery of the device, the power circuit configured to maintain power when the device is placed in a low-power mode. A plurality of input output blocks are included in the device and are for receiving external inputs for the integrated circuit device and for providing outputs from the integrated circuit device. The power circuit is coupled to provide power to at least one of the input output blocks to maintain state when the integrated circuit device is in the low-power mode.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: December 10, 2013
    Assignee: Nvidia Corporation
    Inventor: Tom Verbeure
  • Publication number: 20090259982
    Abstract: In an integrated circuit device, a power circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The device includes a power circuit disposed along the periphery of the device, the power circuit configured to maintain power when the device is placed in a low-power mode. A plurality of input output blocks are included in the device and are for receiving external inputs for the integrated circuit device and for providing outputs from the integrated circuit device. The power circuit is coupled to provide power to at least one of the input output blocks to maintain state when the integrated circuit device is in the low-power mode.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 15, 2009
    Applicant: NVIDIA CORPORATION
    Inventor: Tom Verbeure