Abstract: A sensor circuit having a Single Photon Avalanche Diode (SPAD) and an active quenching circuit including a quenching transistor controlled by a one-shot (or similar) circuit is disclosed. The quenching transistor applies a reverse-bias voltage level on the cathode of the SPAD. During photon detection events, pulses generated by the SPAD's avalanche breakdown trigger the one-shot circuit to de-actuate the quenching transistor, allowing the cathode potential to drop below the SPAD's breakdown voltage. After a delay period, which is defined by the one-shot's configuration, allows reliable completion of the avalanche breakdown process, the one-shot circuit re-actuates the quenching transistor such that the SPAD's cathode is refreshed to the reverse-bias voltage level. The one-shot circuit is optionally coupled by way of capacitors to the SPAD and the quenching transistor to facilitate implementation using standard CMOS elements. The sensor is suitable for use in a LIDAR system.

Abstract: A system that may include (a) a radiation source that is constructed and arranged to illuminate an object with radiation during consecutive time frames of microsecond-scale duration, wherein radiation emitted during one time frame differs by energy from radiation transmitted during an adjacent time frame; and (b) a CMOS sensor that may include a readout circuit and CMOS pixels. Each CMOS pixel may include a radiation sensing element and in-pixel memory elements. Different in-pixel memory elements are constructed and arranged to sample a state of the radiation sensing element during different time frames of the consecutive time frames.

Abstract: A system that may include (a) a radiation source that is constructed and arranged to illuminate an object with radiation during consecutive time frames of microsecond-scale duration, wherein radiation emitted during one time frame differs by energy from radiation transmitted during an adjacent time frame; and (b) a CMOS sensor that may include a readout circuit and CMOS pixels. Each CMOS pixel may include a radiation sensing element and in-pixel memory elements. Different in-pixel memory elements are constructed and arranged to sample a state of the radiation sensing element during different time frames of the consecutive time frames.

Abstract: A sensor circuit having a Single Photon Avalanche Diode (SPAD) and an active quenching circuit including a quenching transistor controlled by a one-shot (or similar) circuit is disclosed. The quenching transistor applies a reverse-bias voltage level on the cathode of the SPAD. During photon detection events, pulses generated by the SPAD's avalanche breakdown trigger the one-shot circuit to de-actuate the quenching transistor, allowing the cathode potential to drop below the SPAD's breakdown voltage. After a delay period, which is defined by the one-shot's configuration, allows reliable completion of the avalanche breakdown process, the one-shot circuit re-actuates the quenching transistor such that the SPAD's cathode is refreshed to the reverse-bias voltage level. The one-shot circuit is optionally coupled by way of capacitors to the SPAD and the quenching transistor to facilitate implementation using standard CMOS elements. The sensor is suitable for use in a LIDAR system.

Abstract: A semiconductor device that may include an avalanche photodiode (APD), the APD may include: a first doped region of a first polarity; a buried guard ring of a second polarity, the second polarity is opposite to the first polarity, the buried guard ring is spaced apart from the first doped region and is positioned below the first doped region; a well of the second polarity, wherein the well interfaces the first doped region to form a p-n junction; and a second doped region of the second polarity, the second doped region is spaced apart from the first doped region.

Abstract: A semiconductor device that may include an avalanche photodiode (APD), the APD may include: a first doped region of a first polarity; a buried guard ring of a second polarity, the second polarity is opposite to the first polarity, the buried guard ring is spaced apart from the first doped region and is positioned below the first doped region; a well of the second polarity, wherein the well interfaces the first doped region to form a p-n junction; and a second doped region of the second polarity, the second doped region is spaced apart from the first doped region.

Abstract: A CMOS image sensor in which each column of pixels is connected to a signal line that is coupled to a current source, and each pixel includes a charge amplifier having a common source configuration arranged such that a charge generated by its photodiode is amplified by the charge amplifier and transmitted to readout circuitry by way of the signal line. In one embodiment the charge amplifier utilizes an NMOS transistor to couple the photodiode charge in an inverted manner to the signal line while converting the charge to a voltage through a capacitor coupled between the signal line and photodiode (i.e., forming a feedback of the NMOS amplifier transistor).

Abstract: A CMOS image sensor in which each column of pixels is connected to a signal line that is coupled to a current source, and each pixel includes a charge amplifier having a common source configuration arranged such that a charge generated by its photodiode is amplified by the charge amplifier and transmitted to readout circuitry by way of the signal line. In one embodiment the charge amplifier utilizes an NMOS transistor to couple the photodiode charge in an inverted manner to the signal line while converting the charge to a voltage through a capacitor coupled between the signal line and photodiode (i.e., forming a feedback of the NMOS amplifier transistor).