Patents by Inventor Tomihito Miyazaki

Tomihito Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10741683
    Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: August 11, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
  • Publication number: 20180204942
    Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
  • Patent number: 9947782
    Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: April 17, 2018
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
  • Patent number: 9466675
    Abstract: A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: October 11, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Chikayuki Okamoto
  • Publication number: 20160056241
    Abstract: A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.
    Type: Application
    Filed: March 4, 2014
    Publication date: February 25, 2016
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito MIYAZAKI, Chikayuki OKAMOTO
  • Patent number: 8987124
    Abstract: A silicon carbide substrate having a main face is prepared. By applying thermal oxidation to the main face of the silicon carbide substrate at a first temperature, an oxide film is formed on the main face. After the oxide film is formed, heat treatment is applied to the silicon carbide substrate at a second temperature higher than the first temperature. An opening exposing a portion of the main face is formed at the oxide film. A Schottky electrode is formed on the main face exposed by the opening.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: March 24, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Toru Hiyoshi
  • Patent number: 8901698
    Abstract: A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm?2 or less.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: December 2, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taku Horii, Tomihito Miyazaki, Makoto Kiyama
  • Patent number: 8815716
    Abstract: A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: August 26, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Makoto Kiyama, Taku Horii
  • Patent number: 8785301
    Abstract: A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: July 22, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Takeyoshi Masuda, Tomihito Miyazaki, Toru Hiyoshi, Satomi Itoh, Hiromu Shiomi
  • Publication number: 20140138709
    Abstract: A first circular surface (11) is provided with a first notch portion (N1a) having a first shape. A second circular surface (21) is opposite to the first circular surface and is provided with a second notch portion (N2a) having a second shape. A side surface (31) connects the first circular surface (11) and the second circular surface (21) to each other. The first notch portion (N1a) and the second notch portion (N2a) are opposite to each other. The side surface (31) has a first depression (Da) connecting the first notch portion (N1a) and the second notch portion (N2a) to each other.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Makoto SASAKI, Shin HARADA, Kyoko OKITA, Tomihito MIYAZAKI
  • Publication number: 20140080292
    Abstract: A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.
    Type: Application
    Filed: November 19, 2013
    Publication date: March 20, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Makoto Kiyama, Taku HORII
  • Patent number: 8614446
    Abstract: A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.
    Type: Grant
    Filed: December 25, 2009
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Makoto Kiyama, Taku Horii
  • Patent number: 8581359
    Abstract: A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×108 cm?2.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: November 12, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taku Horii, Tomihito Miyazaki, Makoto Kiyama
  • Publication number: 20130292695
    Abstract: A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm?2 or less.
    Type: Application
    Filed: July 3, 2013
    Publication date: November 7, 2013
    Inventors: Taku HORII, Tomihito Miyazaki, Makato Kiyama
  • Patent number: 8502337
    Abstract: A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm?2 or less.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: August 6, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taku Horii, Tomihito Miyazaki, Makoto Kiyama
  • Publication number: 20130045592
    Abstract: A method for manufacturing a SiC semiconductor device includes: a step of forming an oxide film on a surface of a SiC substrate; and a step of removing the oxide film. In the step of forming the oxide film, ozone gas is used. In the step of removing the oxide film, it is preferable to use halogen plasma or hydrogen plasma. In this way, problems associated with a chemical solution can be reduced while obtaining a method and device for manufacturing a SiC semiconductor device, by each of which a cleaning effect can be improved.
    Type: Application
    Filed: November 4, 2011
    Publication date: February 21, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tomihito Miyazaki, Hiromu Shiomi, Hideto Tamaso, Takeyoshi Masuda
  • Publication number: 20130009171
    Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.
    Type: Application
    Filed: December 20, 2010
    Publication date: January 10, 2013
    Applicant: Sumitomo Electric Industries,. Ltd.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
  • Publication number: 20120174944
    Abstract: A cleaning method for a SiC semiconductor includes the step of forming an oxide film on a front surface of a SiC semiconductor, and the step of removing the oxide film, and oxygen plasma is used in the step of forming the oxide film. Hydrogen fluoride may be used in the step of removing the oxide film. Thereby, a cleaning effect on the SiC semiconductor can be exhibited.
    Type: Application
    Filed: April 21, 2011
    Publication date: July 12, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomihito Miyazaki, Keiji Wada, Toru Hiyoshi
  • Publication number: 20120178259
    Abstract: A method of cleaning an SiC semiconductor includes the steps of forming an oxide film on a surface of an SiC semiconductor and removing the oxide film. In the step of removing the oxide film, the oxide film is removed with halogen plasma or hydrogen plasma. In the step of removing the oxide film, fluorine plasma is preferably employed as halogen plasma. The SiC semiconductor can be cleaned such that good surface characteristics are achieved.
    Type: Application
    Filed: April 21, 2011
    Publication date: July 12, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tomihito Miyazaki, Keiji Wada, Toru Hiyoshi
  • Publication number: 20120149175
    Abstract: A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.
    Type: Application
    Filed: February 25, 2011
    Publication date: June 14, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Wada, Takeyoshi Masuda, Tomihito Miyazaki, Toru Hiyoshi, Satomi Itoh, Hiromu Shiomi