Abstract: A radio pager and a method of writing information necessary for communication in a ROM (Read Only Memory) of the radio pager by using a ROM writer. The ROM writer determines whether or not it is ready to communicate with the pager and, if it is ready, sends a type code request signal to a CPU incorporated in the pager. On receiving the type code request signal, the CPU sends a type code signal representative of the type of the pager to the ROM writer. In response, the ROM writer identifies the type of the pager and then writes information necessary for communication in the ROM of the pager.

Abstract: A radio pager of the present invention includes a non-volatile memory storing frequency information for each of a plurality of frequency bands for the confirmation of a frequency band. The frequency information are sequentially read out of the memory while frequency signals respectively corresponding to the information are sequentially fed to a frequency synthesizer, until frequency lock is detected. The frequency band to which the locked frequency belongs is determined to be the frequency band assigned to the radio pager and is reported to the operator. Therefore, even before frequency information for allowing the synthesizer to output a desired oscillation frequency corresponding to a receipt frequency is written to the pager and when a frequency band particular to the pager is not labeled on the pager body, the operator can see the frequency band easily. This prevents the operator from writing frequency information in the ROM of an inadequate radio pager to which a desired frequency band is not assigned.

Abstract: The present invention relates to a PLL frequency synthesizer including an A-D converter for receiving a frequency control voltage for a voltage-controlled oscillator for outputting a desired frequency in a frequency stable state, and converting the frequency control voltage into a corresponding digital signal and outputting the digital signal, a storage unit for storing a signal value of the digital signal, a D-A converter for converting the signal value into a corresponding analog signal and outputting the analog signal, a control unit for controlling input of the frequency control voltage to the A-D converter, reading of the signal value from the storage unit, and output of the analog signal from the D-A converter, and a loop filter for applying an output voltage of the analog signal to the voltage-controlled oscillator by the control unit before the synthesizer is started, and a high-speed frequency lock method using this synthesizer.