Patents by Inventor Tomoaki MIYOSHI

Tomoaki MIYOSHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11444161
    Abstract: An InP substrate, being a group III-V compound semiconductor substrate, that includes, on a main surface thereof, 0.22 particles/cm2 that have a particle diameter of at least 0.19 ?m or 20 particles/cm2 that have a particle diameter of 0.079 ?m. An InP substrate with an epitaxial layer, being a group III-V compound semiconductor substrate with an epitaxial layer, includes: the InP substrate and an epitaxial layer arranged upon the main surface of the InP substrate; and, upon the main surface thereof when the thickness of the epitaxial layer is 0.3 ?m, no more than 10 LPD that have a circle-equivalent diameter of at least 0.24 ?m, per cm2, or no more than 30 LPD that have a circle-equivalent diameter of at least 0.136 ?m, per cm2. As a result, a group III-V compound semiconductor substrate capable of reducing defects in an epitaxial layer grown upon a main surface thereof and a group III-V compound semiconductor substrate with an epitaxial layer are provided.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: September 13, 2022
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya Fujiwara, Tomoaki Miyoshi
  • Patent number: 10964786
    Abstract: An InP substrate that is a group III-V compound semiconductor substrate includes particles of greater than or equal to 0.19 ?m in particle size at less than or equal to 0.22 particles/cm2 or particles of greater than or equal to 0.079 ?m in particle size at less than or equal to 20 particles/cm2 on the main surface. An epilayer-attached InP substrate that is an epilayer-attached group III-V compound semiconductor substrate includes the InP substrate mentioned above and an epitaxial layer disposed on the main surface of the InP substrate, and includes LPDs of greater than or equal to 0.24 ?m in circle-equivalent diameter at less than or equal to 10 defects/cm2 or LPDs of greater than or equal to 0.136 ?m in circle-equivalent diameter at less than or equal to 30 defects/cm2 on the main surface in a case where the epitaxial layer has a thickness of 0.3 ?m.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: March 30, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinya Fujiwara, Tomoaki Miyoshi
  • Publication number: 20210057527
    Abstract: An InP substrate, being a group III-V compound semiconductor substrate, that includes, on a main surface thereof, 0.22 particles/cm2 that have a particle diameter of at least 0.19 ?m or 20 particles/cm2 that have a particle diameter of 0.079 ?m. An InP substrate with an epitaxial layer, being a group III-V compound semiconductor substrate with an epitaxial layer, includes: the InP substrate and an epitaxial layer arranged upon the main surface of the InP substrate; and, upon the main surface thereof when the thickness of the epitaxial layer is 0.3 ?m, no more than 10 LPD that have a circle-equivalent diameter of at least 0.24 ?m, per cm2, or no more than 30 LPD that have a circle-equivalent diameter of at least 0.136 ?m, per cm2. As a result, a group III-V compound semiconductor substrate capable of reducing defects in an epitaxial layer grown upon a main surface thereof and a group III-V compound semiconductor substrate with an epitaxial layer are provided.
    Type: Application
    Filed: October 26, 2020
    Publication date: February 25, 2021
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya FUJIWARA, Tomoaki MIYOSHI
  • Publication number: 20200052075
    Abstract: An InP substrate that is a group III-V compound semiconductor substrate includes particles of greater than or equal to 0.19 ?m in particle size at less than or equal to 0.22 particles/cm2 or particles of greater than or equal to 0.079 ?m in particle size at less than or equal to 20 particles/cm2 on the main surface. An epilayer-attached InP substrate that is an epilayer-attached group III-V compound semiconductor substrate includes the InP substrate mentioned above and an epitaxial layer disposed on the main surface of the InP substrate, and includes LPDs of greater than or equal to 0.24 ?m in circle-equivalent diameter at less than or equal to 10 defects/cm2 or LPDs of greater than or equal to 0.136 ?m in circle-equivalent diameter at less than or equal to 30 defects/cm2 on the main surface in a case where the epitaxial layer has a thickness of 0.3 ?m.
    Type: Application
    Filed: May 1, 2018
    Publication date: February 13, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya FUJIWARA, Tomoaki MIYOSHI