Abstract: A signal line terminal allocation method includes an electronic device which is hierarchically designed to obtain terminal allocations which satisfy electrical restrictive conditions. The electronic device includes high hierarchial components and low hierarchial components; the high hierarchial components are connected to the low hierarchical components by a plurality of signal lines through a plurality of signal line terminals.

Abstract: A load distribution method in which loads are divided into groups and each of a plurality of input pins of integrated circuits of a load is wired continuously with one stroke of a signal transmission line in a sequence from a driving output pin in each group when the wiring for distributing the drive signal from the driving output pin of an integrated circuit to plural input pins of integrated circuits, functioning as a load, is such that a plurality of intergrated circuits are mounted at given positions on a printed circuit board. In the load distribution method, the load is divided into groups by equally distributing a number of the loads so as to allow load capacities to be equal to each other on each of a plurality of signal transmission lines, and there is computed a signal propagation delay time of the signal transmission line wired equally in a distance to a load which is equal in a wiring sequence from the driving output pin in each group.

Abstract: Change bits are provided in correspondence with storage information units (blocks or pages) of a storage, and indicate whether or not a "store" operation has been performed into the corresponding storage information units. The change bits are retained in a first retention device in correspondence with the storage information units, and a copy of the change bits in the first retention device is retained in a second retention device. When the store operation is performed to effect a storing of data into the storage, a control device refers to the change bit retained by the second retention device and controls updating of the change bit of the first retention device in accordance with the indication of the change bit referred to.

Abstract: A decimal arithmetic unit for carrying out a decimal arithmetic operation for first and second operands each consisting of a sign digit and numeric data comprises arithmetic means for carrying out the decimal arithmetic operation and sign processing means for processing the sign digits. The numeric data excluding the sign digits of the first and second operands are supplied to the arithmetic means and the sign digits of the first and second operands are supplied to the sign processing means. An output of the arithmetic means and an output of the sign processing means are merged to produce an operation result.

Abstract: A data processing system has an arithmetic operating unit to process a plurality of bytes at a time and carries out an arithmetic operation on first and second operands each starting from any desired address on a main memory and having any desired number of byte length. The second operand is aligned to an operand position of the first operand and the aligned second operand is supplied to the operating unit while the first operand is supplied as it is to the operating unit. Since the second operand is aligned to the operand position of the first operand before it is processed in the operating unit, the number of times of alignment is reduced.