Patents by Inventor Tomohiko Tanabe

Tomohiko Tanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7167474
    Abstract: A network relaying apparatus and method for routing and transferring packets at high speed. A transfer engine stores the packets received through a network interface in a packet buffer, and stores the header information in a header RAM. A search engine searches the transfer control information including the transfer destination information and the action information in accordance with the header information, and writes it in the header RAM. The transfer engine produces an output packet based on the information stored in the packet buffer and the header RAM and outputs it to the transfer destination. A switch switches the output packet to the routing process of the destination. The transfer engine executes the receiving process and the transmission process, and the search engine executes the input search process and the output search process. Each of these processes is executed by pipelining control using a required table independently.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: January 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Publication number: 20040085962
    Abstract: A network relaying apparatus and method for routing and transferring packets at high speed. A transfer engine stores the packets received through a network interface in a packet buffer, and stores the header information in a header RAM. A search engine searches the transfer control information including the transfer destination information and the action information in accordance with the header information, and writes it in the header RAM. The transfer engine produces an output packet based on the information stored in the packet buffer and the header RAM and outputs it to the transfer destination. A switch switches the output packet to the routing process of the destination. The transfer engine executes the receiving process and the transmission process, and the search engine executes the input search process and the output search process. Each of these processes is executed by pipelining control using a required table independently.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 6, 2004
    Applicants: Hitachi, Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Patent number: 6683885
    Abstract: A network relaying apparatus and a network relaying method for securing a high communication quality (QoS), a high reliability and security. A transfer engine stores the packets received through at least a network interface in a packet buffer, and the header information in a header RAM. A search engine searches for the transfer control information such as the destination information and the action information based on the header information, and writes them in the header RAM. The transfer engine prepares an output packet based on the information stored in the packet buffer and the header RAM, and outputs the output packet to the destination. A switch switches the output packet to the routing processor of the destination. Each header RAM is asynchronously accessible independently of the packet buffer and suppresses the competition for access between the transfer engine and the search engine.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: January 27, 2004
    Assignees: Hitachi, Ltd., Hitachi Information Technology Co. Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Patent number: 6671277
    Abstract: A network relaying apparatus and method for high quality transfer of packets under stable quality-of-service (QoS) control. A transfer engine stores the packets received through a network interface, in a packet buffer, and the header information in a RAM. A search engine searches the transfer control information including the transfer destination information and the action information according to the header information and writes the resulting information in the header RAM. The transfer engine produces an output packet based on the information stored in the packet buffer and the header RAM and outputs it to the transfer destination. A switch operates to switch the output packet to the routing processor of the destination. The QoS control is performed at each of a plurality of points including the input-side routing processor, the output-side routing processor 10 and the switch.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: December 30, 2003
    Assignees: Hitachi, Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Patent number: 6658003
    Abstract: A network relaying apparatus and method for detecting a flow at high speed and performing a variety of control operations including quality-of-service (QoS) control and filtering at high speed. A transfer engine stores the packet received through a network interface, in a packet buffer, and stores the header information in a header RAM. A search engine searches the transfer control information including the transfer destination information and the action information according to the header information, and writes it in the header RAM. The transfer engine produces an output packet based on the information stored in the packet buffer and the header RAM and outputs it to the transfer destination. A switch operates to switch the output packet to the routing processor of the final destination.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: December 2, 2003
    Assignees: Hitachi, Ltd., Hitachi Information Technology Co. Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Patent number: 6650642
    Abstract: A network relaying apparatus and method for routing and transferring packets at high speed. A transfer engine stores the packets received through a network interface in a packet buffer, and stores the header information in a header RAM. A search engine searches the transfer control information including the transfer destination information and the action information in accordance with the header information, and writes it in the header RAM. The transfer engine produces an output packet based on the information stored in the packet buffer and the header RAM and outputs it to the transfer destination. A switch switches the output packet to the routing process of the destination. The transfer engine executes the receiving process and the transmission process, and the search engine executes the input search process and the output search process. Each of these processes is executed by pipelining control using a required table independently.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: November 18, 2003
    Assignees: Hirachi, Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Kazuo Sugai, Takeshi Aimoto, Takeki Yazaki, Nobuhito Matsuyama, Yoshihito Sako, Tomohiko Tanabe
  • Patent number: 6478680
    Abstract: A CD-ROM which records a game program and movie data is used to display a movie on part of a face of a character appearing in a game. A predetermined face object is placed in a virtual three-dimensional space. A region of which expression should be changed within the face object is specified. An image data reading unit sequentially reads frame images of movie data representative of a change of expression of the region from the CD-ROM to an image data buffer unit. An image data transferring unit sequentially stores the frame images into a plurality of buffer areas included in a texture data buffer unit, while switching the buffer areas. A texture mapping unit sequentially maps the frame images sequentially stored in the buffer areas within the texture data buffer unit to the region as texture data, in parallel to the storing operation.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: November 12, 2002
    Assignee: Square, Co., Ltd.
    Inventors: Kazuhiko Yoshioka, Masashi Kouda, Tomohiko Tanabe