Patents by Inventor Tomohiro Murata

Tomohiro Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050087763
    Abstract: A semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having such a composition as to generate a 2-dimensional electron gas layer in the upper portion of the first nitride semiconductor layer, and an electrode having an ohmic property and formed selectively on the second nitride semiconductor layer. The second nitride semiconductor layer includes a contact area having at least one inclined portion with a bottom or wall surface thereof being inclined toward the upper surface of the first nitride semiconductor layer and defining a depressed cross-sectional configuration. The electrode is formed on the contact area.
    Type: Application
    Filed: October 22, 2004
    Publication date: April 28, 2005
    Inventors: Atsuhiko Kanda, Tsuyoshi Tanaka, Yasuhiro Uemoto, Yutaka Hirose, Tomohiro Murata
  • Publication number: 20050082568
    Abstract: A semiconductor device has a sapphire substrate, a semiconductor layer made of GaN provided on the sapphire substrate, a multilayer film provided on the semiconductor layer, and an electrode in ohmic contact with the multilayer film. The multilayer film has been formed by alternately stacking two types of semiconductor layers having different amounts of piezopolarization or different amounts of spontaneous polarization and each containing an n-type impurity so that electrons are induced at the interface between the two types of semiconductor layers. This allows the contact resistance between the electrode and the multilayer film and a parasitic resistance in a current transmission path to be reduced to values lower than in a conventional semiconductor device.
    Type: Application
    Filed: June 8, 2004
    Publication date: April 21, 2005
    Inventors: Yutaka Hirose, Daisuke Ueda, Tsuyoshi Tanaka, Yasuhiro Uemoto, Tomohiro Murata
  • Publication number: 20050001235
    Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.
    Type: Application
    Filed: April 29, 2004
    Publication date: January 6, 2005
    Inventors: Tomohiro Murata, Yutaka Hirose, Yoshito Ikeda, Tsuyoshi Tanaka, Kaoru Inoue, Daisuke Ueda, Yasuhiro Uemoto
  • Patent number: 6505257
    Abstract: A plurality of processors of a disk controller are divided into a plurality of clusters. In normal operation, data is transferred between a host computer and a disk drive in a cluster non-restricted processing mode in which a job can be distributedly processed among processors belonging to any clusters without regard to cluster. In response to a program version upgrading command from an operator, the cluster mode is shifted from the cluster non-restricted processing mode to a cluster restricted processing mode in which the cluster to which processors which are permitted to distributedly process one job belong is restricted. When the shifting to the cluster restricted processing mode is completed, one cluster is selected as a cluster to be maintained and versions of the programs to be executed by the processors belonging to the cluster to be maintained are upgraded.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: January 7, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Mitsuaki Niida, Kenzo Kurihara
  • Publication number: 20010007148
    Abstract: A plurality of processors of a disk controller are divided into a plurality of clusters. In a normal operation, data is transferred between a host computer and a disk drive in a cluster non-restricted mode in which a job can be distributedly processed among processors belonging to any clusters without regard to cluster. In response to a program version-up command from an operator, the cluster mode is shifted from the cluster non-restricted mode to a cluster restricted mode in which the cluster to which processors which are permitted to distributedly process one job belong is restricted. When the shifting to the cluster restricted mode is completed, one cluster is selected as a cluster to be maintained and the programs to be executed by the processors belonging to the cluster to be maintained are versioned up by new programs.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 5, 2001
    Inventors: Tomohiro Murata, Mitsuaki Niida, Kenzo Kurihara
  • Patent number: 6216179
    Abstract: A plurality of processors of a disk controller are divided into a plurality of clusters. In normal operation, data is transferred between a host computer and a disk drive in a cluster non-restricted processing mode in which a job can be distributedly processed among processors belonging to any clusters without regard to cluster. In response to a program version upgrading command from an operator, the cluster mode is shifted from the cluster non-restricted processing mode to a cluster restricted processing mode in which the cluster to which processors which are permitted to distributedly process one job belong is restricted. When the shifting to the cluster restricted processing mode is completed, one cluster is selected as a cluster to be maintained and versions of the programs to be executed by the processors belonging to the cluster to be maintained are upgraded.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: April 10, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Mitsuaki Niida, Kenzo Kurihara
  • Patent number: 5729761
    Abstract: A plurality of processors of a disk controller are divided into a plurality of clusters. In normal operation, data is transferred between a host computer and a disk drive in a cluster non-restricted processing mode in which a job can be distributedly processed among processors belonging to any clusters without regard to cluster. In response to a program version upgrading command from an operator, the cluster mode is shifted from the cluster non-restricted processing mode to a cluster restricted processing mode in which the cluster to which processors which are permitted to distributedly process one job belong is restricted. When the shifting to the cluster restricted processing mode is completed, one cluster is selected as a cluster to be maintained and version of the programs to be executed by the processors belonging to the cluster to be maintained are upgraded.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: March 17, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Mitsuaki Niida, Kenzo Kurihara
  • Patent number: 5590272
    Abstract: A disk controller itself performs the serial inspection process in the following way. It divides a track into a current track group directly available for an external computer and a spare track group available for the disk controller independently of the external computer before registering the groups in it. It also automatically selects a track available in the spare track group as an alternative track. It further copies to the alternative track data recorded on a current track to be inspected. In turn, the disk controller writes a test pattern on the current track. With this, it detects a defect position on a surface of a recording medium of the current track. It also registers the defect position detected on the surface of the recording medium to the current track. It further copies the data having been copied on the alternative track to the current track.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: December 31, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Kenzo Kurihara, Kazuhiro Kawashima, Mitsuaki Niida
  • Patent number: 5404487
    Abstract: A disc controller, which is connected to a plurality of channels for supplying access requests and discs. The controller includes a plurality of storage paths which control transfer of data between a cache, the channels and the discs, and a control memory which controls the respective operations of the plurality of storage paths. The control memory stores information which is used to select a storage path in accordance with predetermined standards for storage path selection. A disc or the cache is accessed using the selected storage path.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: April 4, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Masaharu Akatsu, Kenzo Kurihara, Yoshiaki Kuwahara, Shigeo Honma
  • Patent number: 5390186
    Abstract: In order for a disk control unit with built-in cache to write non-reflective data in the cache to a disk drive without stopping extension of a read/write command from host computer in the event of a fault in the cache or its backup memory, the track data in normal one of the cache and its backup memory is written to a certain physical track of the disk drive upon judging at read/write command execution that the accessed track is a non-reflective track, and a read/write command from the host computer is implemented for the physical track of the disk drive which has completed the non-reflective track write operation.
    Type: Grant
    Filed: November 20, 1990
    Date of Patent: February 14, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Masaharu Akatsu, Kenzo Kurihara, Shigeo Homma, Akira Yamamoto
  • Patent number: 5375227
    Abstract: Herein disclosed is a disk controller having a cache. This cache is so managed that a predetermined part composed of at least one of a plurality parts divided therefrom is initialized. In response to a request for cache activation from a host computer, the initializations of the cache are partly executed in a repeated manner, and a request for disk input/output is intermittently processed so that the whole initializations of a cache having a large capacity can be executed in parallel with the online process.Moreover, the logic failure of the cache and the hardware failure of a memory are divided. When the logic failure occurs, the use of the case is temporarily prohibited, and the whole initializations of the cache are executed automatically at the side of the disk controller without any intervention of a maintenance man so that the cache can be used again.
    Type: Grant
    Filed: August 28, 1990
    Date of Patent: December 20, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Masaharu Akatsu, Tomohiro Murata, Kenzou Kurihara, Morihiko Yotsuya, Koji Ozawa
  • Patent number: 4802094
    Abstract: A method and an apparatus of removing works from each of the facilities in a production line is described in order to facilitate changing of a work monitoring operation in accordance with, for example, a layout change in the production line and a change in the facilities. Work tracking conditions are stored in a memory in the form of a table, and work tracking management data and plant status data which have been stored in the memory separately are retrived while the work tracking conditions are referred to, thereby extracting management data for which tracking conditions have been completed. The extracted management data is subjected to processing such as movement and updating in accordance with the contents of the above-described data which are referred to.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: January 31, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Nakamura, Tomohiro Murata, Norihisa Komoda, Kazuo Kera, Kenji Tsuchitani, Kuniaki Matsumoto
  • Patent number: 4638227
    Abstract: In order to execute a series of moving sequences by synchronous and exclusive control of unit operations taught or programed in advance, there are provided a first storing of the relationship of the sequence of execution of each unit operation to other unit operations to be controlled synchronously or exclusively; a second storing of information relating to the operational status of each unit operation; and a third storing of operating instructions for executing each unit operation. When machine tools have stopped due to the occurrence of an abnormality while a series of unit operations are being executed by the operating instructions stored in the third storing means, a unit operation for restarting on the basis of the relationship of the executing sequence stored during the first storing is appointed, and information concerning the operational status stored during the second storing is corrected.
    Type: Grant
    Filed: January 16, 1985
    Date of Patent: January 20, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Katayama, Norihisa Komoda, Tomohiro Murata, Kazuo Kera
  • Patent number: 4633385
    Abstract: In order to execute a series of operation sequence including synchronization and exclusion for an automatic machine such as a robot by combining pretaught or preprogrammed unit operations, there are provided first memory for storing a start sequence of the unit operations to be synchronized or excluded, second memory for storing operation status of the unit operations and third memory for storing operation command to start the unit operations. The unit operations to be started are determined by referring the start sequence and the operation status of the unit operations read from the memories, and the corresponding operation commands are read out of the third memory to squentially start the unit operations.In order to execute an repetitive operation of similar works, there is provided fourth memory for storing basic operation patterns common to the repetitive operation in a non-repetitive manner.
    Type: Grant
    Filed: May 2, 1984
    Date of Patent: December 30, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Murata, Norihisa Komoda, Koichi Haruna