Abstract: A wireless communication system includes a plurality of sets of base station devices and terminal station devices configured to perform communications in an equal frame length using a time division duplex scheme, the communications of the plurality of sets being simultaneously operated in adjacent areas, in which each of the base station devices includes a control unit configured to control a transmission timing of a downlink signal transmitted from the base station device itself based on a communication distance between the base station device and the terminal station device of each of the sets or a reception timing of a downlink signal in the terminal station device such that reception timings of downlink signals transmitted from the base station device itself and other base station devices in the terminal station devices of the sets fall within a predetermined range determined in advance.

Abstract: An object of the present invention is to provide a cyan colored curable composition useful for producing a color filter and other products having high sensitivity and color separability. A cyan colored curable composition comprising a colorant, a resin, a polymerizable compound, and a polymerization initiator, the colorant comprising a compound represented by formula (1) and an organic pigment: wherein G1 represents a C2-20 alkanediyl group, wherein —CH2— contained in the alkanediyl group is optionally substituted with —O—, J1 represents a hydrogen atom, —NRaRb, or —NRaRbH+Q?, Ra and Rb each independently represent a hydrogen atom or a C1-8 alkyl group, Q? represents a halide ion, BF4?, PF6?, ClO4?, X—CO2?, or X—SO3?, X represents a monovalent organic group, and na represents an integer of 1 to 4.

Abstract: There is provided with a method of treating cancer. A set of administration of a compound represented by General Formula (I) or a pharmaceutically acceptable salt thereof to a patient, at a dose such that 8 mg/kg or less of the compound represented by General Formula (I) is administered, and irradiation to the patient immediately following the administration is repeated. A total dosage of the irradiation to a cancer is 10 Gy or more.

Abstract: A conductor connection device for joining a plurality of conductors with ultrasonic welding, the conductor connection device comprising: a horn including a contact surface that is brought into contact with the conductors, the horn being configured to be ultrasonically vibrated; a pair of restricting portions configured to be brought into contact with the contact surface and to be relatively movable along the contact surface; and an anvil that is relatively moved toward and away from the contact surface, the horn and the pair of restricting portions being moved relative to the anvil to sandwich the anvil between the pair of restricting portions facing each other, and at least one of the pair of restricting portions being moved toward the other.

Abstract: [Object] The present invention provides a joined conductor and a method for manufacturing a joined conductor that can improve electrical conductivity between conductors.

Abstract: A conductor connection device for joining a plurality of conductors with ultrasonic welding, the conductor connection device comprising: a horn including a contact surface that is brought into contact with the conductors, the horn being configured to be ultrasonically vibrated; a pair of restricting portions configured to be brought into contact with the contact surface and to be relatively movable along the contact surface; and an anvil that is relatively moved toward and away from the contact surface, the horn and the pair of restricting portions being moved relative to the anvil to sandwich the anvil between the pair of restricting portions facing each other, and at least one of the pair of restricting portions being moved toward the other.

Abstract: A display device includes a gate lines extending in a first direction, data lines extending in a second direction, pixel electrodes, a common electrode disposed to face the pixel electrodes, common wirings that are electrically connected to the common electrode; and a common bus line that extends in the first direction outside of a display region and is electrically connected to the common wirings. Each of the common wiring includes a first common wiring portion extending in the first direction and a second common wiring portion that is connected to the first common wiring portion and extends in the second direction outside of the display region. A width of the first common wiring portion in the first direction is larger than a width of the second common wiring portion in the first direction. Both ends of the first common wiring portion in the first direction are electrically connected to the common bus line.

Abstract: A superconducting fault current limiter (10) is provided with superconducting elements (71, 72) that are in a superconducting state during electrification with a current value in a fixed range and in a normal conducting state during electrification with a fault current in which the current value exceeds the fixed range and is further provided with a coolant vessel (20), which accommodates a liquid coolant (60) and a plurality of superconducting elements, and a cooling means (40) that cools the liquid coolant within the coolant vessel. Within the liquid coolant, the superconducting element (71) for which the critical current is smallest among the plurality of superconducting elements is disposed on the upper side of any other superconducting elements (72). Thus, the superconducting element (71) is cooled, and the life of the superconducting fault current limiter as a whole is extended.

Abstract: A liquid crystal display device includes an image display area including a plurality of pixels arranged in a matrix, and a peripheral area disposed outside the image display area and including circuitry. The peripheral area includes a first potential supply layer, a second potential supply layer and a third potential supply layer. The first potential supply layer is provided to supply a potential to a common electrode of the plurality of pixels in the image display area. The third potential supply layer is connected to power supply circuitry for receiving the potential. The second potential supply layer includes bridge patterns separated by spaces, and the bridge patterns connect the first potential supply layer and the second potential supply layer.

Abstract: A display device includes a gate lines extending in a first direction, data lines extending in a second direction, pixel electrodes, a common electrode disposed to face the pixel electrodes, common wirings that are electrically connected to the common electrode; and a common bus line that extends in the first direction outside of a display region and is electrically connected to the common wirings. Each of the common wiring includes a first common wiring portion extending in the first direction and a second common wiring portion that is connected to the first common wiring portion and extends in the second direction outside of the display region. A width of the first common wiring portion in the first direction is larger than a width of the second common wiring portion in the first direction. Both ends of the first common wiring portion in the first direction are electrically connected to the common bus line.

Abstract: A display device includes a gate lines extending in a first direction, data lines extending in a second direction, pixel electrodes, a common electrode disposed to face the pixel electrodes, common wirings that are electrically connected to the common electrode; and a common bus line that extends in the first direction outside of a display region and is electrically connected to the common wirings. Each of the common wiring includes a first common wiring portion extending in the first direction and a second common wiring portion that is connected to the first common wiring portion and extends in the second direction outside of the display region. A width of the first common wiring portion in the first direction is larger than a width of the second common wiring portion in the first direction. Both ends of the first common wiring portion in the first direction are electrically connected to the common bus line.

Abstract: A display device includes a gate lines extending in a first direction, data lines extending in a second direction, pixel electrodes, a common electrode disposed to face the pixel electrodes, common wirings that are electrically connected to the common electrode; and a common bus line that extends in the first direction outside of a display region and is electrically connected to the common wirings. Each of the common wiring includes a first common wiring portion extending in the first direction and a second common wiring portion that is connected to the first common wiring portion and extends in the second direction outside of the display region. A width of the first common wiring portion in the first direction is larger than a width of the second common wiring portion in the first direction. Both ends of the first common wiring portion in the first direction are electrically connected to the common bus line.

Abstract: A liquid crystal display device includes an image display area including a plurality of pixels arranged in a matrix, and a peripheral area disposed outside the image display area and including circuitry. The peripheral area includes a first potential supply layer, a second potential supply layer and a third potential supply layer. The first potential supply layer is provided to supply a potential to a common electrode of the plurality of pixels in the image display area. The third potential supply layer is connected to power supply circuitry for receiving the potential. The second potential supply layer includes bridge patterns separated by spaces, and the bridge patterns connect the first potential supply layer and the second potential supply layer.

Abstract: Provided is a display device, including: a display panel including a plurality of test transistors each of which is connected to one wiring line selected out of data lines and gate lines, a control signal input pad configured to input a control signal for putting the test transistors into one of an on state and an off state during a test of the display panel, and an off-voltage input terminal configured to input an off voltage for fixing the plurality of test transistors to the off state during display operation; gate driver ICs provided outside the display panel; a gate driver external circuit board to which the gate driver ICs are electrically connected; and off-voltage input wiring through which the off voltage is input to the off-voltage input terminal, in which the off-voltage input wiring is electrically connected to the off-voltage input terminal via the gate driver external circuit board.

Abstract: In a liquid crystal display device, a TFT substrate includes a GAL layer including gate signal lines, an SDL layer including data signal lines, and a CMT layer including common signal lines and a common signal bus line. The common signal bus line is connected to, among a plurality of common potential supply terminals arranged on one side of the TFT substrate, one of common potential supply terminals that are positioned at both ends, and is connected to a common potential supply terminal on an inner side with respect to the common potential supply terminals at both the ends so as to overlap and cross with at least one of the data signal lines.

Abstract: A superconducting fault current limiter (10) is provided with superconducting elements (71, 72) that are in a superconducting state during electrification with a current value in a fixed range and in a normal conducting state during electrification with a fault current in which the current value exceeds the fixed range and is further provided with a coolant vessel (20), which accommodates a liquid coolant (60) and a plurality of superconducting elements, and a cooling means (40) that cools the liquid coolant within the coolant vessel. Within the liquid coolant, the superconducting element (71) for which the critical current is smallest among the plurality of superconducting elements is disposed on the upper side of any other superconducting elements (72). Thus, the superconducting element (71) is cooled, and the life of the superconducting fault current limiter as a whole is extended.

Abstract: Provided is a liquid crystal display device including a TFT substrate including a pixel electrode and a common electrode. A GAL layer includes gate signal lines, a CMT layer includes common signal lines and a common signal bus line, and an SDL layer includes data signal lines. At least one of the GAL layer and the SDL layer includes a common potential bus line. Further, the TFT substrate includes an interlayer connecting portion for connecting the common signal bus line and the common potential bus line to each other.

Abstract: In a liquid crystal display device, a TFT substrate includes a GAL layer including gate signal lines, an SDL layer including data signal lines, and a CMT layer including common signal lines and a common signal bus line. The common signal bus line is connected to, among a plurality of common potential supply terminals arranged on one side of the TFT substrate, one of common potential supply terminals that are positioned at both ends, and is connected to a common potential supply terminal on an inner side with respect to the common potential supply terminals at both the ends so as to overlap and cross with at least one of the data signal lines.

Abstract: Provided is a liquid crystal display device including a TFT substrate including a pixel electrode and a common electrode. A GAL layer includes gate signal lines, a CMT layer includes common signal lines and a common signal bus line, and an SDL layer includes data signal lines. At least one of the GAL layer and the SDL layer includes a common potential bus line. Further, the TFT substrate includes an interlayer connecting portion for connecting the common signal bus line and the common potential bus line to each other.

Abstract: A superconducting element for a superconducting fault current limiter, including a substrate 32, an intermediate layer 34 that is formed on the substrate 32, a superconducting layer 36 that is formed on the intermediate layer 34, an electrode 44 that is connected to the superconducting layer 36, and a metal fine particle sintered layer 40 that is interposed between the superconducting layer 36 and the electrode 44 and connects the superconducting layer 36 and the electrode 44.