Abstract: A current sensor for detecting a current based on a terminal voltage and a resistance value of a shunt resistor, includes: a resistance value correction circuit having: correction resistors; a signal application unit; a voltage detection unit that detects terminal voltages of the shunt resistor and a part of the correction resistors in a first period, and terminal voltages of all of the correction resistors in a second period; and a correction unit that corrects the resistance value for current detection based on a calculated resistance value of the shunt resistor. Resistance values and resistance accuracies of the correction resistors are higher as the plurality of correction resistors are disposed farther from the shunt resistor.

Abstract: A current sensor of a detection target current using a shunt resistor includes: a resistance value correction circuit having: a correction resistor; a signal application unit that applies an alternating current signal to a series circuit of the shunt resistor and the correction resistor; a first voltage detection unit that detects the terminal voltage of the shunt resistor; a second voltage detection unit that detects a terminal voltage of the correction resistor; and a correction unit that calculates the resistance value of the shunt resistor based on a first voltage detection value by the first voltage detection unit and a second voltage detection value by the second voltage detection unit, and corrects the resistance value for current detection based on a calculated resistance value of the shunt resistor.

Abstract: In a pulse edge detection circuit, a measurement circuit has a comparator provided therein which compares a voltage with a reference voltage and outputs a pulse signal. An RSFF puts a signal in a high level at a timing at which detecting a rise edge due to a change of the pulse signal to the high level. In such manner, a set signal of an RSFF becomes inactive and a reset signal of the RSFF becomes active, and a fall edge of the pulse signal becomes detectable. When a fall edge is generated due to a change of the pulse signal from the high level to the low level, the set signal of the RSFF becomes active, and a signal becomes high level.

Abstract: A differential communication circuit is connected to a communication line formed of a positive communication line and a negative communication line for differential communication. The differential communication circuit includes: a series circuit that includes a resistor element and a connection switch. The resistor element is connected between the positive and negative communication lines when the connection switch is turned on. The circuit also includes a transmission unit that is configured to output a differential signal to the communication line and a controller that is configured to change impedance of the communication line by turning on the connection switch in a period during which the transmission unit does not output the differential signal.

Abstract: An analog-to-digital converter includes a primary converter and a secondary converter. The primary converter executes conversion processing to convert an analog input signal to a first digital signal through delta-sigma modulation. The secondary converter outputs a second digital signal by converting amplified analog output of a quantization error in the primary converter to the second digital signal.

Abstract: In a communication system, a control unit and driver units are connected in a daisy chain; each unit includes a corresponding insulated communication circuit, respectively. The control unit measures a communication delay time between the control unit and each driver unit from a response time to transmission of a pulse signal performed to each driver unit during a measurement period. Then, based on each communication delay time, the control unit transmits a shift time to each driver unit for equalizing the timing of signals output by the driver units. When each driver unit receives, from the control unit, an instruction instructing each driver unit to output a signal, each driver unit outputs the signal when the shift time has elapsed.

Abstract: A differential communication driver circuit includes a drive unit that drives differential signal lines connected via capacitors by a source current and a sink current. When a noise detection unit detects that in-phase noise is applied to the differential signal lines, a drive assisting unit maintains an amplitude of a differential signal output to the differential signal lines by increasing a current drive capability of the sink current.

Abstract: A drive circuit drives a switch configuring a power converter. The drive circuit divides an inter-terminal voltage of a switch. The drive circuit includes a differential circuit having first and second input terminals to which the divided inter-terminal voltages are inputted. The differential circuit outputs an analog voltage based on a voltage difference between the input terminals. The differential circuit executes reset of the output voltage, and with the voltage difference when reset is canceled after reset is executed as a reference voltage, outputs an analog voltage in which an amount of change from the reference voltage is multiplied by an amplification factor. The drive circuit outputs a binary signal based on comparison results between a threshold and the analog voltage outputted from the differential circuit, and sets a transfer rate of a gate charge of the switch when a driving state is switched, based on the output signal thereof.

Abstract: In a drive circuit, a differential circuit unit is configured such that resetting of an output voltage of the differential circuit unit is carried out, and the resetting of the output voltage of the differential circuit unit is cancelled. A value of the difference between first and second divided terminal voltages at a timing of cancelling the resetting is defined as a reference voltage. The differential circuit unit generates, as the output voltage, a product of a voltage change from a reference voltage and a predetermined amplification factor after cancelling of the resetting of the differential circuit unit. A signal generator generates a gate signal for the upper- and lower-arm switches in accordance with a value of the output voltage of the differential circuit unit while the upper- and lower-arm switches are in an off state.

Abstract: A signal detection circuit includes: a first capacitor having a first terminal connected with a first main terminal of a switching element; a second capacitor having a first terminal connected with a second main terminal of the switching element; and a detection circuit having a differential circuit configuration. The detection circuit receives, as input signals, a signal from a second terminal of the first capacitor and a signal from a second terminal of the second capacitor, detects detection target signals based on the input signals. The detection target signals include a signal of the first main terminal of the switching element and a signal of the second main terminal of the switching element.

Abstract: A signal detection circuit detects, as a detection target signal, a signal of a main terminal of a switching element by comparing the detection target signal with a reference signal. The signal detection circuit includes: a signal generation unit generating the reference signal; a first capacitor having a first terminal connected with the main terminal of the switching element; a second capacitor having a first terminal connected with an output terminal of the signal generation unit; and a detection circuit receiving, as input signals, a signal output from a second terminal of the first capacitor and a signal output from a second terminal of the second capacitor, and the detection circuit detecting the detection target signal based on the input signals.

Abstract: A gyroscope includes a MEMS sensor having a drive signal input terminal, a drive signal output terminal, and a sense signal output terminal. The gyroscope further includes a quadrature demodulator that demodulates a modulated sense signal and offset canceller circuits that cancel a direct current offset component included in an in-phase signal and a quadrature signal of the sense signal. The gyroscope has a quadrature error detector that detects a quadrature error based on the signals input from the offset canceller circuits and outputs an error signal. The gyroscope also has an IQ corrector circuit that receives the in-phase signal and the quadrature signal of the sense signal as inputs, and outputs a phase signal with a phase based on the error signal.

Abstract: A vibration type gyroscope uses a resonator formed of a MEMS. At the time of startup, a lock state determination unit stabilizes an amplitude of a drive signal and outputs a lock signal when the amplitude is stabilized. A phase shifter generates an orthogonal signal by shifting, by 90°, the phase of the drive signal, and a phase compensator outputs a phase signal having a phase corresponding to a control signal based on the orthogonal signal and the in-phase signal of the drive signal. A multiplier multiplies a sense signal and the phase signal outputted from the phase compensator, and a control LPF performs filtering on a multiplication result. A control unit inputs a zero level signal to a PI controller during an initial state, and starts phase control by receiving an output signal of the control LPF, and ends the control when the signal is stabilized around the zero level.

Abstract: An A/D converter includes: a sampler that includes a sampling capacitor and samples an input signal; a D/A converter that selectively outputs an analog voltage; an integrator that integrates an input from the sampler and an input from the D/A converter; Multiple switches that include a first switch independently connecting the sampler to the integrator, a second switch independently connecting the D/A converter to the integrator, a third switch, and, a fourth switch, a quantizer that quantizes an output of the integrator; a control circuit that outputs a digital value based on an output of the quantizer, and a reference potential generation circuit that provides a second reference potential to an integrator side of the sampler through the third switch and provides a first reference potential to the integrator side of the D/A converter through the fourth switch.

Abstract: An A/D conversion device, which operates in one mode including at least one of a ?? mode, a cyclic mode, and a hybrid mode, includes: a first block that processes an analog input signal by a first amplifier; a second block including a second amplifier; a quantization unit that quantizes one of outputs of the first and second blocks; and a control circuit that switches the mode to perform a control corresponding to the mode.

Abstract: An A/D converter includes: a sampler that includes a sampling capacitor and samples an input signal; a D/A converter that selectively outputs an analog voltage; an integrator that integrates an input from the sampler and an input from the D/A converter; Multiple switches that include a first switch independently connecting the sampler to the integrator, a second switch independently connecting the D/A converter to the integrator, a third switch, and, a fourth switch, a quantizer that quantizes an output of the integrator; a control circuit that outputs a digital value based on an output of the quantizer, and a reference potential generation circuit that provides a second reference potential to an integrator side of the sampler through the third switch and provides a first reference potential to the integrator side of the D/A converter through the fourth switch.

Abstract: An A/D conversion device, which operates in one mode including at least one of a ?? mode, a cyclic mode, and a hybrid mode, includes: a first block that processes an analog input signal by a first amplifier; a second block including a second amplifier; a quantization unit that quantizes one of outputs of the first and second blocks; and a control circuit that switches the mode to perform a control corresponding to the mode.

Abstract: A vibration type gyroscope uses a resonator formed of a MEMS. At the time of startup, a lock state determination unit stabilizes an amplitude of a drive signal and outputs a lock signal when the amplitude is stabilized. A phase shifter generates an orthogonal signal by shifting, by 90°, the phase of the drive signal, and a phase compensator outputs a phase signal having a phase corresponding to a control signal based on the orthogonal signal and the in-phase signal of the drive signal. A multiplier multiplies a sense signal and the phase signal outputted from the phase compensator, and a control LPF performs filtering on a multiplication result. A control unit inputs a zero level signal to a PI controller during an initial state, and starts phase control by receiving an output signal of the control LPF, and ends the control when the signal is stabilized around the zero level.

Abstract: A ?? modulator includes an input circuit having a sampling capacitor, an integration circuit, a quantizer and a D/A converter having a DAC capacitor. The input circuit takes in an analog input voltage in the sampling capacitor in a sampling period, and transfers a charge to the integration circuit in a holding period. The D/A converter takes in an analog potential, to which selection switches are connected in the sampling period based on a digital output of the quantizer, in the DAC capacitor, and subtracts a charge from the integration circuit in the holding period. At this time, since the input circuit and the D/A converter are set so that the holding periods do not overlap with each other, an error caused by the lowering of a feedback factor is suppressed.

Abstract: An input signal Vin is sampled, when a first terminal of a sampling capacitor is connected to a node and a second terminal of the sampling capacitor is connected to an analog ground. A charge transfer operation is performed, when the first terminal of the sampling capacitor is connected to the analog ground and the second terminal of the sampling capacitor is connected to an inverting input terminal of an operational amplifier. A quantization is performed, when an output of the operational amplifier is input to a quantizer. Most significant bits are generated by repeating a subtraction operation in which a charge subtraction unit subtracts a charge accumulated in the integration capacitor based on a quantization result a predetermined number of times. Least significant bits are generated when a voltage provided by amplifying a voltage corresponding to a charge remaining in the integration capacitor is input to a sub-A/D converter after generation of the most significant bits.