Patents by Inventor Tomohiro Nitta
Tomohiro Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11935936Abstract: [Object] It is an object of the present invention to provide an aluminum alloy film having excellent bending resistance and heat resistance, and a thin film transistor including the aluminum alloy film. [Solving Means] In order to achieve the above-mentioned object, an aluminum alloy film according to an embodiment of the present invention includes: an Al pure metal that includes at least one type of a first additive element selected from the group consisting of Zr, Sc, Mo, Y, Nb, and Ti. A content of the first additive element is 0.01 atomic % or more and 1.0 atomic % or less. Such an aluminum alloy film has excellent bending resistance and excellent heat resistance. Further, also etching can be performed on the aluminum alloy film.Type: GrantFiled: March 28, 2019Date of Patent: March 19, 2024Assignee: ULVAC, INC.Inventors: Yuusuke Ujihara, Motoshi Kobayashi, Yasuhiko Akamatsu, Tomohiro Nagata, Ryouta Nakamura, Junichi Nitta, Yasuo Nakadai
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Patent number: 10741686Abstract: A method for manufacturing a semiconductor device according to an embodiment includes implanting impurity ions into a SiC layer in a direction of <10-11>±1 degrees, <10-1-1>±1 degrees, <10-12>±1 degrees, or <10-1-2>±1 degrees.Type: GrantFiled: March 15, 2016Date of Patent: August 11, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Kono, Tomohiro Nitta
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Publication number: 20180254186Abstract: A method for manufacturing a semiconductor device includes introducing a group III element to a part of a substrate containing silicon and carbon; introducing oxygen into the part of the substrate; and heating the substrate after introducing the Group III element and the oxygen.Type: ApplicationFiled: August 30, 2017Publication date: September 6, 2018Inventors: Tomohiro Nitta, Toshihide Shinmei
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Patent number: 9793357Abstract: A semiconductor device includes first, second, third, and fourth electrodes, a first insulating film, and first, second third, and fourth silicon carbide layers. A first distance between the first electrode and a first interface between the fourth electrode and fourth silicon carbide region is longer than a second distance between the first insulating film and a second interface between the third silicon carbide region and the fourth silicon carbide region. The fourth silicon carbide region is between the third silicon carbide region and the second silicon carbide region in a direction perendicular to the second interface.Type: GrantFiled: March 15, 2016Date of Patent: October 17, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Kono, Kohei Morizuka, Yoichi Hori, Atsuko Yamashita, Tomohiro Nitta
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Publication number: 20170077290Abstract: A method for manufacturing a semiconductor device according to an embodiment includes implanting impurity ions into a SiC layer in a direction of <10-11>±1 degrees, <10-1-1>±1 degrees, <10-12>±1 degrees, or <10-1-2>±1 degrees.Type: ApplicationFiled: March 15, 2016Publication date: March 16, 2017Inventors: Hiroshi Kono, Tomohiro Nitta
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Publication number: 20170077238Abstract: Provided is a semiconductor device according to an embodiment including: a first electrode; a second electrode; a third electrode provided between the first electrode and the second electrode; a first insulating film provided between the third electrode and the second electrode; a silicon carbide layer provided between the first insulating film and the second electrode; a first silicon carbide region provided between the third electrode and the second electrode, the first silicon carbide region being provided in the silicon carbide layer; a second silicon carbide region provided between the third electrode and the first silicon carbide region, the second silicon carbide region being provided in the silicon carbide layer; a third silicon carbide region provided between the third electrode and the second silicon carbide region, the third.Type: ApplicationFiled: March 15, 2016Publication date: March 16, 2017Inventors: Hiroshi Kono, Kohei Morizuka, Yoichi Hori, Atsuko Yamashita, Tomohiro Nitta
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Patent number: 9029915Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1-xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1-yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.Type: GrantFiled: February 12, 2013Date of Patent: May 12, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
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Patent number: 8390030Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1?xN (0?×<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1?yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.Type: GrantFiled: April 17, 2008Date of Patent: March 5, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
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Patent number: 8227834Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.Type: GrantFiled: August 26, 2011Date of Patent: July 24, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
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Publication number: 20110309413Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.Type: ApplicationFiled: August 26, 2011Publication date: December 22, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Yasunobu SAITO, Wataru SAITO, Yorito KAKIUCHI, Tomohiro NITTA, Akira YOSHIOKA, Totsuya OHNO, Hidetoshi FUJIMOTO, Takao NODA
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Patent number: 8030660Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.Type: GrantFiled: February 13, 2009Date of Patent: October 4, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
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Patent number: 7935983Abstract: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control electrode provided between the first main electrode and the second main electrode on the barrier layer. The substrate includes at least one layer having a resistivity of 1 k?/cm or more.Type: GrantFiled: July 25, 2007Date of Patent: May 3, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yasunobu Saito, Wataru Saito, Takao Noda, Tomohiro Nitta
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Patent number: 7728354Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).Type: GrantFiled: November 14, 2007Date of Patent: June 1, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
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Publication number: 20090200576Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.Type: ApplicationFiled: February 13, 2009Publication date: August 13, 2009Applicant: Kabushiki Kaisha ToshibaInventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
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Patent number: 7538366Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.Type: GrantFiled: April 25, 2007Date of Patent: May 26, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi
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Patent number: 7498618Abstract: A nitride semiconductor device comprises: a substrate body including a conductive substrate portion and a high resistance portion; a first semiconductor layer of a nitride semiconductor provided on the substrate body; a second semiconductor layer provided on the first semiconductor layer; a first main electrode provided on the second semiconductor layer; a second main electrode provided on the second semiconductor layer; and a control electrode provided on the second semiconductor layer between the first main electrode and the second main electrode. The second semiconductor layer is made of a nondoped or n-type nitride semiconductor having a wider bandgap than the first semiconductor layer. The first main electrode is provided above the conductive portion and the second main electrode is provided above the high resistance portion.Type: GrantFiled: August 22, 2006Date of Patent: March 3, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Masaaki Onomura, Akira Tanaka, Koichi Tachibana, Masahiko Kuraguchi, Takao Noda, Tomohiro Nitta, Akira Yoshioka
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Publication number: 20080277692Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1?xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1?yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.Type: ApplicationFiled: April 17, 2008Publication date: November 13, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
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Publication number: 20080116486Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).Type: ApplicationFiled: November 14, 2007Publication date: May 22, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Wataru SAITO, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
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Publication number: 20080023706Abstract: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control electrode provided between the first main electrode and the second main electrode on the barrier layer. The substrate includes at least one layer having a resistivity of 1 k?/cm or more.Type: ApplicationFiled: July 25, 2007Publication date: January 31, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasunobu Saito, Wataru Saito, Takao Noda, Tomohiro Nitta
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Publication number: 20070254431Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.Type: ApplicationFiled: April 25, 2007Publication date: November 1, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi