Patents by Inventor Tomohiro Nitta

Tomohiro Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935936
    Abstract: [Object] It is an object of the present invention to provide an aluminum alloy film having excellent bending resistance and heat resistance, and a thin film transistor including the aluminum alloy film. [Solving Means] In order to achieve the above-mentioned object, an aluminum alloy film according to an embodiment of the present invention includes: an Al pure metal that includes at least one type of a first additive element selected from the group consisting of Zr, Sc, Mo, Y, Nb, and Ti. A content of the first additive element is 0.01 atomic % or more and 1.0 atomic % or less. Such an aluminum alloy film has excellent bending resistance and excellent heat resistance. Further, also etching can be performed on the aluminum alloy film.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 19, 2024
    Assignee: ULVAC, INC.
    Inventors: Yuusuke Ujihara, Motoshi Kobayashi, Yasuhiko Akamatsu, Tomohiro Nagata, Ryouta Nakamura, Junichi Nitta, Yasuo Nakadai
  • Patent number: 10741686
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes implanting impurity ions into a SiC layer in a direction of <10-11>±1 degrees, <10-1-1>±1 degrees, <10-12>±1 degrees, or <10-1-2>±1 degrees.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: August 11, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Tomohiro Nitta
  • Publication number: 20180254186
    Abstract: A method for manufacturing a semiconductor device includes introducing a group III element to a part of a substrate containing silicon and carbon; introducing oxygen into the part of the substrate; and heating the substrate after introducing the Group III element and the oxygen.
    Type: Application
    Filed: August 30, 2017
    Publication date: September 6, 2018
    Inventors: Tomohiro Nitta, Toshihide Shinmei
  • Patent number: 9793357
    Abstract: A semiconductor device includes first, second, third, and fourth electrodes, a first insulating film, and first, second third, and fourth silicon carbide layers. A first distance between the first electrode and a first interface between the fourth electrode and fourth silicon carbide region is longer than a second distance between the first insulating film and a second interface between the third silicon carbide region and the fourth silicon carbide region. The fourth silicon carbide region is between the third silicon carbide region and the second silicon carbide region in a direction perendicular to the second interface.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Kohei Morizuka, Yoichi Hori, Atsuko Yamashita, Tomohiro Nitta
  • Publication number: 20170077290
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes implanting impurity ions into a SiC layer in a direction of <10-11>±1 degrees, <10-1-1>±1 degrees, <10-12>±1 degrees, or <10-1-2>±1 degrees.
    Type: Application
    Filed: March 15, 2016
    Publication date: March 16, 2017
    Inventors: Hiroshi Kono, Tomohiro Nitta
  • Publication number: 20170077238
    Abstract: Provided is a semiconductor device according to an embodiment including: a first electrode; a second electrode; a third electrode provided between the first electrode and the second electrode; a first insulating film provided between the third electrode and the second electrode; a silicon carbide layer provided between the first insulating film and the second electrode; a first silicon carbide region provided between the third electrode and the second electrode, the first silicon carbide region being provided in the silicon carbide layer; a second silicon carbide region provided between the third electrode and the first silicon carbide region, the second silicon carbide region being provided in the silicon carbide layer; a third silicon carbide region provided between the third electrode and the second silicon carbide region, the third.
    Type: Application
    Filed: March 15, 2016
    Publication date: March 16, 2017
    Inventors: Hiroshi Kono, Kohei Morizuka, Yoichi Hori, Atsuko Yamashita, Tomohiro Nitta
  • Patent number: 9029915
    Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1-xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1-yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
  • Patent number: 8390030
    Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1?xN (0?×<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1?yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
  • Patent number: 8227834
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Publication number: 20110309413
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Application
    Filed: August 26, 2011
    Publication date: December 22, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu SAITO, Wataru SAITO, Yorito KAKIUCHI, Tomohiro NITTA, Akira YOSHIOKA, Totsuya OHNO, Hidetoshi FUJIMOTO, Takao NODA
  • Patent number: 8030660
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: October 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Patent number: 7935983
    Abstract: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control electrode provided between the first main electrode and the second main electrode on the barrier layer. The substrate includes at least one layer having a resistivity of 1 k?/cm or more.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: May 3, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Takao Noda, Tomohiro Nitta
  • Patent number: 7728354
    Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
  • Publication number: 20090200576
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 13, 2009
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Patent number: 7538366
    Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: May 26, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi
  • Patent number: 7498618
    Abstract: A nitride semiconductor device comprises: a substrate body including a conductive substrate portion and a high resistance portion; a first semiconductor layer of a nitride semiconductor provided on the substrate body; a second semiconductor layer provided on the first semiconductor layer; a first main electrode provided on the second semiconductor layer; a second main electrode provided on the second semiconductor layer; and a control electrode provided on the second semiconductor layer between the first main electrode and the second main electrode. The second semiconductor layer is made of a nondoped or n-type nitride semiconductor having a wider bandgap than the first semiconductor layer. The first main electrode is provided above the conductive portion and the second main electrode is provided above the high resistance portion.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: March 3, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Masaaki Onomura, Akira Tanaka, Koichi Tachibana, Masahiko Kuraguchi, Takao Noda, Tomohiro Nitta, Akira Yoshioka
  • Publication number: 20080277692
    Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1?xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1?yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.
    Type: Application
    Filed: April 17, 2008
    Publication date: November 13, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
  • Publication number: 20080116486
    Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).
    Type: Application
    Filed: November 14, 2007
    Publication date: May 22, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru SAITO, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
  • Publication number: 20080023706
    Abstract: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control electrode provided between the first main electrode and the second main electrode on the barrier layer. The substrate includes at least one layer having a resistivity of 1 k?/cm or more.
    Type: Application
    Filed: July 25, 2007
    Publication date: January 31, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Wataru Saito, Takao Noda, Tomohiro Nitta
  • Publication number: 20070254431
    Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.
    Type: Application
    Filed: April 25, 2007
    Publication date: November 1, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi