Abstract: Serial data are transmitted between transceivers via a communication path, each bit expressed by a dominant code or a recessive code which vary between dominant and recessive levels, the dominant code having a greater proportion of duration at the dominant level. A device (clock master) can continuously output successive recessive codes to the communication path, in which condition a transceiver can transmit a dominant code by producing an output drive signal which overwrites a part of a recessive code, currently being received from the communication path, to the dominant level. The output drive signal is shaped with a steeper edge slope at a transition from an inactive to an active level than from the active to the inactive level, enabling an increased data transmission rate without increased noise.

Abstract: A communication system is provide which includes a plurality of communication units connected to a communication line, in which collisions occur between dominant signals outputted from the communication units on the communication line. At least one of the communication units includes a first driver which is set so that a variation of voltage applied to the communication line in transmission of the dominant signal with respect to that in absence of transmission of the dominant signal is smaller than a variation of voltage applied from another of the communication units to the communication line in transmission of the dominant signal. One of the communication units, which differs from the communication unit including the first driver, includes a second driver which limits variation per unit time of current flowing through the communication line in transmission of the dominant signal.

Abstract: A ringing suppression circuit for a communication circuit that performs communication through a transmission line includes a high side switch connected between a high potential reference point and a high side line of the transmission line, a low side switch connected between a low potential reference point and a low side line of the transmission line, and a ringing suppression section. The ringing suppression section turns on the high side switch based on a difference between a potential of the high side line and a potential applied to a control terminal of the high side switch. The ringing suppression section turns on the low side switch based on a difference between a potential of the low side line and a potential applied to a control terminal of the low side switch.

Abstract: In a receiver circuit, a binary signal is generated based on a signal level of a received signal that has been received via a transmission line from a driver of a transmitter circuit. Then, a first stable state and a second stable state are detected based on a reference signal whose signal level changes in accordance with the received signal. In the first stable state, the received signal is stable at a first signal level. In the second stable state, the received signal is stable at a second signal level. When the first stable state is detected and the received signal is changed from the first signal level into the second signal level, the generated binary signal is retained at a signal level corresponding to the second signal level, until the second stable state is detected.

Abstract: In a transceiver, a clock generator generates a second clock synchronized with a first clock. The second clock has a period corresponding to a duration of one bit of a digital signal. When first transmission data is supplied to the transceiver with being asynchronous to the second clock, a sampling timing generator detects start data of the first transmission data as a start timing, and generates sampling timings based on the first clock in response to the start timing. The sampling timings have intervals each of which is defined to correspond to the period of the second clock. The first sampling timing is spaced from the start timing. A sampling module samples, at each of the sampling timings, the first transmission data, thus generating second transmission data synchronized with the second clock.

Abstract: A transceiver that transmits and receives data used in a communication system, in which the data is encoded by a transmission line code and a signal level of the transmission code changes at a predetermined transition timing in a bit-duration. The transceiver includes: a clock generator that generates an internal clock used for internal circuits; a timing generator that generates, by using the internal clock generated by the clock generator, a timing signal synchronized to a reference clock supplied externally; an encoding circuit that encodes, by using the timing signal generated by the timing generator, a transmission data which is synchronized to the reference clock to be the transmission line code; and a waveform shaping unit that performs a waveform shaping of a waveform at the predetermined is transition timing of the transmission data to be based on the reference clock.

Abstract: A communication apparatus includes a detecting unit, a process performing unit, and a range setting unit. The detecting unit detects a boundary pattern periodically appearing between codes in a binary coded signal transmitted through a transmission line. The boundary pattern is information showing a boundary appearing between codes. The process performing unit performs a process in synchronization with timing of appearance of the boundary pattern. The range setting unit sets an allowance range which is set include timing at which it is estimated that the next boundary pattern appears. The timing is counted from the timing currently detected by the detecting unit. The detecting unit includes a section which detects the timing of appearance of the boundary pattern during the allowance range.

Abstract: An encoding circuit encodes a NRZ code into a transmission line code. A decoding circuit decodes the transmission line code into a NRZ code. If an operation-mode specified by a setting signal is a normal-mode, a transmission switching circuit provides transmit-data received from an input terminal to the encoding circuit to output the encoded transmit-data as communication-data from a communication terminal. If the operation-mode is a sleep-mode, the transmission switching circuit outputs the transmit-data received from the input terminal as the communication-data from the communication terminal. If the operation-mode specified by the setting signal is a normal-mode, a reception switching circuit provides the communication-data received from the communication terminal to the decoding circuit to output the decoded communication-data as receive-data from an output terminal.

Abstract: The communication signal generating device is for use in a communication system where communication signals each of which is set at a first level or a second level are exchanged among a plurality of communication apparatuses through a communication line. The communication signal generating device includes a switching element provided in a communication line to connect the communication line to a ground or a constant voltage source, and a driving means to generate a first communication signal at the first level by turning on the switching element to thereby pass a certain current to the communication line, and generate a second communication signal at the second level by turning off the switching element to thereby pass no current to the communication line. The driving means is configured to gradually increase an output impedance of the switching element during one bit time of the first communication signal.

Abstract: In a receiver circuit, a binary signal is generated based on a signal level of a received signal that has been received via a transmission line from a driver of a transmitter circuit. Then, a first stable state and a second stable state are detected based on a reference signal whose signal level changes in accordance with the received signal. In the first stable state, the received signal is stable at a first signal level. In the second stable state, the received signal is stable at a second signal level. When the first stable state is detected and the received signal is changed from the first signal level into the second signal level, the generated binary signal is retained at a signal level corresponding to the second signal level, until the second stable state is detected.

Abstract: A communication load determining apparatus is used for a communication system which includes a plurality of communication devices performing communication via a common bus. The communication system operates in accordance with a communication protocol that defines which a priority order is set to each of the frames transmitted from the communication devices and which a frame having a lower priority has a longer transmission latency before being transmitted to the bus. In the communication load determining apparatus, a low-priority frame having a lower priority than other frames to the bus is transmitted, and a transmission latency of the low-priority frame is measured. The communication load determining apparatus determines whether or not abnormality has occurred in a communication load in the bus on the basis of the measured transmission latency to produce a determination result. The produced determination result is stored.

Abstract: An on-board network system is presented. The on-board network system sends a sleep-entered message to a communication bus. The sleep-entered message is sent under a condition that a sleep condition is satisfied on a basis that a network management (NM) message is ceased during state transition process in which node's state transfers from a normal state to a power-saving state. A monitoring ECU corresponding to a master performs an abnormality detection process. In the abnormality detection process, the monitoring ECU detects an abnormality state of the state transition process based on whether or not the sleep-entered message is sent from any one of nodes, thereby it is possible to detect the abnormality state not only during each node is a normal state but also during a bus-sleep state.

Abstract: A decoder for decoding an input signal coded with a pulse width modulation code as a line code to an output signal in a binary code, has a first memory, a first timer, a determination circuit and a first controller. The information on a duty duration of the PWM code, corresponding to at least one kind of the output signals, is stored on the first memory. The first timer has a capacity to measure the duty duration of the input signal. The determination circuit has a capacity to determining which kind of the output signals corresponds to the input signal, on the basis of the information stored on the first memory and the duty duration measured with the first timer. The first controller has a capacity to updating the information stored on the first memory, on the basis of the determination result and the measured duty duration.

Abstract: Serial data are transmitted between transceivers via a communication path, each bit expressed by a dominant code or a recessive code which vary between dominant and recessive levels, the dominant code having a greater proportion of duration at the dominant level. A device (clock master) can continuously output successive recessive codes to the communication path, in which condition a transceiver can transmit a dominant code by producing an output drive signal which overwrites a part of a recessive code, currently being received from the communication path, to the dominant level. The output drive signal is shaped with a steeper edge slope at a transition from an inactive to an active level than from the active to the inactive level, enabling an increased data transmission rate without increased noise.

Abstract: A communication system includes a plurality of nodes performing communication via a common communication channel based on a communication protocol and including a first node or a second node. The first node transmits, to the communication channel, a wake-up frame as the communication frame for enabling the second node to transition from a sleep state to a normal state, determines whether or not the second node transitions to the normal state due to the wake-up frame, and generates an abnormal waveform pattern in the communication channel when determined that the second node does not transition to the normal state. The second node stores the identification information allocated to the second node, and enables the second node to transition from the sleep state to the normal state under on condition that the identification information included in the wake-up frame received from the communication channel is identical to the stored identification information.

Abstract: When a transmission signal is detected as having been changed from a high level to a low level, two transmission lines are connected for only a predetermined time through a diode by a first transistor and a second transistor. The diode is arranged such that its forward direction is from a high-side transmission line to a low-side transmission line. The diode turns on, when a potential of the high-side transmission line becomes higher than that of the low-side transmission line by ringing and a potential difference therebetween exceeds a forward drop voltage of the diode. As a result, a peak wave level of a positive side in the ringing is limited to the forward drop voltage of the diode.

Abstract: An inter-line switching element formed of a MOSFET is provided between a pair of signal lines. When the level of a differential signal changes from high to low, a control circuit turns on the FET for a fixed period thereby to suppress ringing by decreasing the impedance between the signal lines when the level of the differential signal transitions, and causing the energy of the distortion of the differential signal waveform to be absorbed by the on-resistance of the FET.

Abstract: A ringing suppression circuit for a communication circuit that performs communication through a transmission line includes a high side switch connected between a high potential reference point and a high side line of the transmission line, a low side switch connected between a low potential reference point and a low side line of the transmission line, and a ringing suppression section. The ringing suppression section turns on the high side switch based on a difference between a potential of the high side line and a potential applied to a control terminal of the high side switch. The ringing suppression section turns on the low side switch based on a difference between a potential of the low side line and potential applied to a control terminal of the low side switch.

Abstract: A bus monitoring security device is connected to a bus, which includes a tool side bus having a tool connection terminal and an ECU side bus. The ECU side bus is coupled with an ECU, and the tool side bus is coupled with a tool capable of communicating with the ECU via the tool connection terminal. The tool side bus and the ECU side bus are separately coupled with the bus monitoring security device. The bus monitoring security device includes: a controller for determining whether the tool being to access the ECU is connected to the ECU side bus, and for restricting transmission and reception of data between the tool and the ECU when the controller determines that the tool is connected to the ECU side bus.

Abstract: In a slave node, a signal processor stores therein wakeup information uniquely defined for the slave node. The signal processor includes a writing unit configured to write the wakeup information into the transceiver at a given timing. A transceiver includes a memory. The wakeup information is written into the memory to be held therein. The transceiver includes a wakeup determiner. The wakeup determiner compares information received via the communication bus with the wakeup information held in the memory if the slave node is operating in the sleep mode, and determines whether the slave node should shift to the wakeup mode according to a result of the comparison.