Patents by Inventor Tomoko Jinbo

Tomoko Jinbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050218435
    Abstract: A CVD device (100) used for depositing a silicon nitride has a structure in which a hot wall furnace (103) for thermally degrading a source gas and a chamber (101) for forming a film over a surface of a wafer (1) are separated from each other. The hot wall furnace (103) for thermally degrading the source gas is provided above the chamber (101), and a heater (104) capable of setting the inside of the furnace at a high temperature atmosphere of approximately 1200° C. is provided at the outer periphery thereof. The source gas, supplied to the hot wall furnace (103) through pipes (105) and (106), is thermally degraded in this furnace in advance, and degraded components thereof are supplied on a stage (102) of the chamber (101) to form a film on the surface of the wafer (1).
    Type: Application
    Filed: May 10, 2005
    Publication date: October 6, 2005
    Inventors: Hidenori Sato, Katsuhiko Ichinose, Yukino Ishii, Tomoko Jinbo
  • Patent number: 6933201
    Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: August 23, 2005
    Assignees: Hitachi, Ltd., Hitachi ULSI Sytems Co., Ltd.
    Inventors: Tatsuya Tominari, Takashi Hashimoto, Tomoko Jinbo, Tsutomu Udo
  • Patent number: 6905982
    Abstract: A CVD device (100) used for depositing a silicon nitride has a structure in which a hot wall furnace (103) for thermally degrading a source gas and a chamber (101) for forming a film over a surface of a wafer (1) are separated from each other. The hot wall furnace (103) for thermally degrading the source gas is provided above the chamber (101), and a heater (104) capable of setting the inside of the furnace at a high temperature atmosphere of approximately 1200° C. is provided at the outer periphery thereof. The source gas, supplied to the hot wall furnace (103) through pipes (105) and (106), is thermally degraded in this furnace in advance, and degraded components thereof are supplied on a stage (102) of the chamber (101) to form a film on the surface of the wafer (1).
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: June 14, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Hidenori Sato, Katsuhiko Ichinose, Yukino Ishii, Tomoko Jinbo
  • Publication number: 20040097100
    Abstract: A CVD device (100) used for depositing a silicon nitride has a structure in which a hot wall furnace (103) for thermally degrading a source gas and a chamber (101) for forming a film over a surface of a wafer (1) are separated from each other. The hot wall furnace (103) for thermally degrading the source gas is provided above the chamber (101), and a heater (104) capable of setting the inside of the furnace at a high temperature atmosphere of approximately 1200° C. is provided at the outer periphery thereof. The source gas, supplied to the hot wall furnace (103) through pipes (105) and (106), is thermally degraded in this furnace in advance, and degraded components thereof are supplied on a stage (102) of the chamber (101) to form a film on the surface of the wafer (1).
    Type: Application
    Filed: November 13, 2003
    Publication date: May 20, 2004
    Inventors: Hidenori Sato, Katsuhiko Ichinose, Yukino Ishii, Tomoko Jinbo
  • Publication number: 20030157774
    Abstract: Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.
    Type: Application
    Filed: January 21, 2003
    Publication date: August 21, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Tatsuya Tominari, Takashi Hashimoto, Tomoko Jinbo, Tsutomu Udo