Patents by Inventor Tomoko Matsunaga

Tomoko Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11926904
    Abstract: Provided are an aqueous composition with which the surface of stainless steel is adequately roughened in an efficient manner with few steps, a method for roughening stainless steel, etc. The problem mentioned above is solved by an aqueous composition for roughening the surface of stainless steel, the aqueous composition including 0.1-20 mass % of hydrogen peroxide with reference to the total amount of the aqueous composition, 0.25-40 mass % of copper ions with reference to the total amount of the aqueous composition, and 1-30 mass % of halide ions with reference to the total amount of the aqueous composition.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: March 12, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kazuhiko Ikeda, Tomoko Fujii, Hiroshi Matsunaga, Satoshi Tamai
  • Patent number: 5440675
    Abstract: An analyzing method for resource allocation and scheduling enhances simplification and speed-up of the process without employing a linear programming method, but based on an experimental method. The method uses a network consisting of nodes and branches for a model of resource allocation. In a network composed of extracted strongly connected components, the weight of each branch is repeatedly determined so that the sum of the weight of the input branches is equal to the sum of the weight of the output branches at each node. Furthermore, a branch having the maximum weight is detected in the network, so that the nodes are scheduled.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: August 8, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomoko Matsunaga, Tamotsu Nishiyama
  • Patent number: 5416721
    Abstract: In network charts such as logic circuit diagrams, the present invention makes it possible to perform level assignment of nodes efficiently and universally. A method for assigning levels to nodes according to the present invention includes a first step of dividing a network chart or a logic circuit into strongly connected components, a second step of providing all arcs with weights for every node of the above described strongly connected components having at least two nodes so that the inflow of arc weight may become equivalent to the outflow thereof, a third step of detecting an arc for which the weight in the above described strongly connected component becomes the maximum, and a fourth step of determining a disconnection point of a loop out of arcs for which the above described weights become the maximum or becomes its proportionate magnitude. All loops included in the network chart are thus removed.
    Type: Grant
    Filed: January 13, 1992
    Date of Patent: May 16, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tamotsu Nishiyama, Kazushi Ikeda, Tomoko Matsunaga
  • Patent number: 5013656
    Abstract: A process is disclosed for producing orotic acid, the process involves culturing in a medium a microorganism of the genus Corynebacterium which is capable of producing orotic acid and has resistance to a pyrimidine analogue or to both a pyrimidine analogue and a sulfa drug, until orotic acid is accumulated in the culture, and recovering orotic acid therefrom.
    Type: Grant
    Filed: October 12, 1988
    Date of Patent: May 7, 1991
    Assignee: Kyowa Hakko Kogyo Co., Ltd.
    Inventors: Kenichiro Takayama, Tomoko Matsunaga